41512: 02/04/01: Loi Tran: Web pack (how to) ?
41585: 02/04/02: Kamal: Re: Web pack (how to) ?
41514: 02/04/01: I. Servan Uzun: ALTERA Apex Device
41517: 02/04/01: Falk Brunner: Re: ALTERA Apex Device
41518: 02/04/01: Paul Baxter: Re: ALTERA Apex Device
41524: 02/04/01: VP: Data Compression in FPGAs
41526: 02/04/01: John_H: Re: Data Compression in FPGAs
41528: 02/04/01: Keith R. Williams: Re: Data Compression in FPGAs
41538: 02/04/01: John_H: Re: Data Compression in FPGAs
41549: 02/04/02: Guy Schlacter: CAM info: Data Compression in FPGAs
41555: 02/04/01: Keith R. Williams: Re: Data Compression in FPGAs
41534: 02/04/01: D.A.Kopf: Re: Data Compression in FPGAs
41551: 02/04/01: VP: Re: Data Compression in FPGAs
41537: 02/04/01: glen herrmannsfeldt: Re: Data Compression in FPGAs
41553: 02/04/02: Mark Nelson: Re: Data Compression in FPGAs
41574: 02/04/02: glen herrmannsfeldt: Re: Data Compression in FPGAs
41610: 02/04/03: Tom St Denis: Re: Data Compression in FPGAs
41611: 02/04/03: Jose Commins: Re: Data Compression in FPGAs
41613: 02/04/03: Tom St Denis: Re: Data Compression in FPGAs
41571: 02/04/02: Jose Commins: Re: Data Compression in FPGAs
41529: 02/04/01: Spaced Cowboy: Laying out the design
41530: 02/04/01: Ray Andraka: Re: Laying out the design
41540: 02/04/01: Spaced Cowboy: Re: Laying out the design
41541: 02/04/01: Jan Gray: Re: Laying out the design
41542: 02/04/02: Tim: Re: Laying out the design
41543: 02/04/02: Ray Andraka: Re: Laying out the design
41546: 02/04/01: Kevin Brace: Re: Laying out the design
41556: 02/04/02: Ray Andraka: Re: Laying out the design
41561: 02/04/02: Peter Ormsby: Re: Laying out the design
41579: 02/04/02: Kevin Brace: Re: Laying out the design
41776: 02/04/08: Peter Ormsby: Re: Laying out the design
42006: 02/04/12: Kevin Brace: Re: Laying out the design
42025: 02/04/13: Ray Andraka: Re: Laying out the design
41531: 02/04/01: Terry: Configuring the Virtex II FPGA
41577: 02/04/02: RS: Re: Configuring the Virtex II FPGA
41580: 02/04/02: Steve Casselman: Re: Configuring the Virtex II FPGA
41599: 02/04/03: jakab tanko: Re: Configuring the Virtex II FPGA
41623: 02/04/03: Brendan Bridgford: Re: Configuring the Virtex II FPGA
41539: 02/04/01: D2fabrizio: Announce: TimingAnalyzer Program Update
41557: 02/04/01: Leon Qin: [HELP] Can't Install Altera QuartusII 2.0 SP1
41591: 02/04/02: Leon Qin: Re: [HELP] Can't Install Altera QuartusII 2.0 SP1
41595: 02/04/02: Girl: Re: [HELP] Can't Install Altera QuartusII 2.0 SP1
41605: 02/04/03: Leon Qin: Re: [HELP] Can't Install Altera QuartusII 2.0 SP1
41559: 02/04/01: j zhang: pricing and gate count info
41560: 02/04/02: Peter Alfke: Re: pricing and gate count info
41569: 02/04/02: rickman: Re: pricing and gate count info
41584: 02/04/02: Jay: Re: pricing and gate count info
41562: 02/04/01: GrueblsAndi: Virtex-II Pro: Rocket I/O termination power supply
41563: 02/04/02: sadik: floorplanning for FPGA
41564: 02/04/02: niv: Re: floorplanning for FPGA
41596: 02/04/02: Girl: Re: floorplanning for FPGA
41565: 02/04/02: Andy Mitchell: ISE Foundation - Making Macros
41570: 02/04/02: Amit Deshpande: how to synchronise asynchronous inputs?
41572: 02/04/02: Falk Brunner: Re: how to synchronise asynchronous inputs?
41573: 02/04/02: Anon: Marquis of Queensbury Rules
41578: 02/04/02: Ray Andraka: Re: Marquis of Queensbury Rules
41590: 02/04/02: Kevin Brace: Re: Marquis of Queensbury Rules
41639: 02/04/04: Phil Connor: Re: Marquis of Queensbury Rules
41649: 02/04/04: Nial Stewart: Re: Marquis of Queensbury Rules
41698: 02/04/05: Kevin Brace: Re: Marquis of Queensbury Rules
41778: 02/04/08: Peter Ormsby: Re: Marquis of Queensbury Rules
42007: 02/04/12: Kevin Brace: Re: Marquis of Queensbury Rules
42018: 02/04/12: Peter Ormsby: Re: Marquis of Queensbury Rules
42026: 02/04/13: Ray Andraka: Re: Marquis of Queensbury Rules
41600: 02/04/03: Jonathan Bromley: Re: Marquis of Queensbury Rules
41601: 02/04/03: Phil Connor: Re: Marquis of Queensbury Rules
41582: 02/04/02: Max Edmand: Simulator for xilinx Cores?
41587: 02/04/03: Ray Andraka: Re: Simulator for xilinx Cores?
41699: 02/04/04: Max Edmand: Re: Simulator for xilinx Cores?
41732: 02/04/06: Ray Andraka: Re: Simulator for xilinx Cores?
41750: 02/04/06: a_darabiha: Re: Simulator for xilinx Cores?
41586: 02/04/02: Loi Tran: Re: Web pack (how to)?
41594: 02/04/03: SƒEawomir Balon: ACEX maximal clock...
41619: 02/04/03: sunny: Re: ACEX maximal clock...
41621: 02/04/03: Jay: Re: ACEX maximal clock...
41636: 02/04/04: SƒEawomir Balon: Re: ACEX maximal clock...
41672: 02/04/04: Jay: Re: ACEX maximal clock...
41629: 02/04/03: Ray Andraka: Re: ACEX maximal clock...
41597: 02/04/03: Kelvin Xu Qijun: Design of a complex filter used in Bluetooth receiver.
41602: 02/04/03: Amit Deshpande: how to synchronise asynchronous inputs?
41617: 02/04/03: John_H: Re: how to synchronise asynchronous inputs?
41922: 02/04/10: CP: Re: how to synchronise asynchronous inputs?
41604: 02/04/03: Krzysztof Szczepanski: Pullup of Spartan-2
41615: 02/04/03: rickman: Re: Pullup of Spartan-2
41622: 02/04/03: Jay: Re: Pullup of Spartan-2
41624: 02/04/03: Peter Alfke: Re: Pullup of Spartan-2
41607: 02/04/03: Rolf: Xilinx makesrc
41608: 02/04/03: Tim: Re: Xilinx makesrc
41609: 02/04/03: Frank Zampa: Signals pollution.
41612: 02/04/03: Rene Tschaggelar: Re: Signals pollution.
41614: 02/04/03: Frank Zampa: Re: Signals pollution.
41638: 02/04/04: Noddy: Re: Signals pollution.
41616: 02/04/03: John_H: Re: Signals pollution.
41634: 02/04/04: Frank Zampa: Re: Signals pollution.
41652: 02/04/04: Peter Alfke: Re: Signals pollution.
41618: 02/04/03: Don Teeter: How to force Foundation to NOT use an ILB flop?
41726: 02/04/05: Jay: Re: How to force Foundation to NOT use an ILB flop?
41635: 02/04/03: Will: Free6502 ops
41728: 02/04/05: John Eaton: Re: Free6502 ops
41637: 02/04/04: Kevin Brace: Does anyone know how bitgen's /Gclkdel option works?
41641: 02/04/04: Jimmy Zhang: hand placement
41646: 02/04/04: Ray Andraka: Re: hand placement
41660: 02/04/04: Nicholas Weaver: Re: hand placement
41665: 02/04/04: Steve Casselman: Re: hand placement
41669: 02/04/04: Peter Alfke: Re: hand placement
41671: 02/04/04: Tim: Re: hand placement
41673: 02/04/04: Steve Casselman: Re: hand placement
41677: 02/04/05: Jim Granville: Re: hand placement
41806: 02/04/08: Steve Casselman: Re: hand placement
41681: 02/04/05: Kelvin Xu Qijun: Re: hand placement
41695: 02/04/05: Jimmy Zhang: Re: hand placement
41700: 02/04/05: Nicholas Weaver: Re: hand placement
41664: 02/04/04: Kevin Brace: Re: hand placement
41674: 02/04/05: Ray Andraka: Re: hand placement
41679: 02/04/05: Russell Shaw: Re: hand placement
41682: 02/04/05: Ray Andraka: Re: hand placement
41686: 02/04/04: Kevin Brace: Re: hand placement
41704: 02/04/05: Philip Freidin: Re: hand placement
41719: 02/04/05: Kevin Brace: Re: hand placement
41689: 02/04/04: Kevin Brace: Re: hand placement
41685: 02/04/04: Kevin Brace: Re: hand placement
41690: 02/04/05: Ray Andraka: Re: hand placement
41696: 02/04/04: Kevin Brace: Re: hand placement
41703: 02/04/05: Philip Freidin: Re: hand placement
41718: 02/04/05: Kevin Brace: Re: hand placement
41720: 02/04/05: Philip Freidin: Re: hand placement
41723: 02/04/05: Eric Crabill: Re: hand placement
41779: 02/04/08: Kevin Brace: Re: hand placement
41722: 02/04/05: Eric Crabill: Re: hand placement
41782: 02/04/08: Kevin Brace: Re: hand placement
41875: 02/04/09: Eric Crabill: Re: hand placement
41911: 02/04/10: Kevin Brace: Re: hand placement
41915: 02/04/10: Eric Crabill: Re: hand placement
41917: 02/04/11: Steve Casselman: Re: hand placement
41688: 02/04/05: Nicholas Weaver: Re: hand placement
41691: 02/04/05: Ray Andraka: Re: hand placement
41694: 02/04/05: Nicholas Weaver: Re: hand placement
41733: 02/04/06: Ray Andraka: Re: hand placement
41735: 02/04/06: Nicholas Weaver: Re: hand placement
41713: 02/04/05: John_H: Re: hand placement
41687: 02/04/05: Phil Hays: Re: hand placement
41692: 02/04/05: Ray Andraka: Re: hand placement
41712: 02/04/05: Ken McElvain: Re: hand placement
41716: 02/04/05: John_H: Re: hand placement
41734: 02/04/06: Ray Andraka: Re: hand placement
41642: 02/04/04: Christopher Saunter: Schematic Stuff
41647: 02/04/04: Ray Andraka: Re: Schematic Stuff
41651: 02/04/04: Eric Crabill: Re: Schematic Stuff
41683: 02/04/05: Kelvin Xu Qijun: Re: Schematic Stuff
41684: 02/04/04: Eric Crabill: Re: Schematic Stuff
41693: 02/04/05: Ray Andraka: Re: Schematic Stuff
41705: 02/04/05: newman: Re: Schematic Stuff
41702: 02/04/05: Phil Connor: Re: Schematic Stuff
41793: 02/04/08: Christopher Saunter: Re: Schematic Stuff
41643: 02/04/04: Thomas: download PC - to Lattice ispLSI 2192 (jtag) device WinNT
41644: 02/04/04: Jon Schneider: Can't get off the ground withg an XC2S30
41648: 02/04/04: JB: Monostable multivibrator
41653: 02/04/04: Mike Treseler: Re: Monostable multivibrator
41656: 02/04/04: Keith R. Williams: Re: Monostable multivibrator
41680: 02/04/05: Ray Andraka: Re: Monostable multivibrator
41701: 02/04/05: Phil Connor: Re: Monostable multivibrator
41697: 02/04/05: Jimmy Zhang: again this hand placement thing
41731: 02/04/06: Ray Andraka: Re: again this hand placement thing
41706: 02/04/05: Jack Nimble: Help: Design a crystal oscillator in a Xilinx XCR3256XL
41708: 02/04/05: Tim: Re: Design a crystal oscillator in a Xilinx XCR3256XL
41724: 02/04/05: Jay: Re: Help: Design a crystal oscillator in a Xilinx XCR3256XL
41725: 02/04/06: Jim Granville: Re: Help: Design a crystal oscillator in a Xilinx XCR3256XL
41707: 02/04/05: Roberto Capobianco: DPLL
41709: 02/04/05: Peter Alfke: Re: DPLL
41710: 02/04/05: Roberto Capobianco: Re: DPLL
41711: 02/04/05: Jens Frauenschlaeger: Parallel cable IV schematic available???
41717: 02/04/05: Falk Brunner: Re: Parallel cable IV schematic available???
41714: 02/04/05: sajjad: Vertex 2 DCM problem
41715: 02/04/05: Kamal: Re: Vertex 2 DCM problem
41721: 02/04/05: clevin1234: Re: 32 bit accumulator/comparator PWM?
41727: 02/04/06: Alexander Miks: How sensitive is the EPM7064?
41740: 02/04/06: Falk Brunner: Re: How sensitive is the EPM7064?
41851: 02/04/09: Nial Stewart: Re: How sensitive is the EPM7064?
41870: 02/04/09: Alexander Miks: Re: How sensitive is the EPM7064?
41754: 02/04/06: Alexander Miks: Re: How sensitive is the EPM7064?
41729: 02/04/05: Kevin Brace: Re: 32 bit accumulator/comparator PWM?
41730: 02/04/06: clevin1234: Re: 32 bit accumulator/comparator PWM?
41736: 02/04/06: Jim Granville: Re: 32 bit accumulator/comparator PWM?
41773: 02/04/08: Jim Granville: Re: 32 bit accumulator/comparator PWM?
41777: 02/04/08: Jim Granville: Re: 32 bit accumulator/comparator PWM?
41814: 02/04/09: Jim Granville: Re: 32 bit accumulator/comparator PWM?
41834: 02/04/08: Peter Alfke: Re: 32 bit accumulator/comparator PWM?
41858: 02/04/09: C.W. THomas: Re: 32 bit accumulator/comparator PWM?
41738: 02/04/06: Kevin Brace: Re: 32 bit accumulator/comparator PWM?
41737: 02/04/05: Apollo: Debussy warnings!
41748: 02/04/06: Jay: Re: Distributed ram
41752: 02/04/06: Falk Brunner: Re: Distributed ram
41755: 02/04/07: Russell Shaw: Re: Distributed ram
41757: 02/04/06: Peter Alfke: Re: Distributed ram
41800: 02/04/08: Ulf Samuelsson: Re: Distributed ram
41742: 02/04/06: Russell Shaw: Distributed ram
41744: 02/04/06: Falk Brunner: Re: Distributed ram
41747: 02/04/06: Peter Alfke: Re: Distributed ram
41743: 02/04/06: Itsaso Zuazua: A learner of Modelsim
41745: 02/04/06: Falk Brunner: Re: A learner of Modelsim
41746: 02/04/06: Niv: Re: A learner of Modelsim
41769: 02/04/07: Speedy Zero Two: Re: A learner of Modelsim
41770: 02/04/07: Alex Sherstuk: Re: A learner of Modelsim
41796: 02/04/08: Martin: Re: A learner of Modelsim
41759: 02/04/07: Russell Shaw: Xilinx programmer
41761: 02/04/07: Falk Brunner: Re: Xilinx programmer
41767: 02/04/07: Kevin Brace: Re: Xilinx programmer
41780: 02/04/08: rjshaw: Re: Xilinx programmer
41785: 02/04/08: Kevin Brace: Re: Xilinx programmer
41808: 02/04/08: Falk Brunner: Re: Xilinx programmer
41815: 02/04/08: Kevin Brace: Re: Xilinx programmer
41869: 02/04/09: Falk Brunner: Re: Xilinx programmer
41906: 02/04/10: Kevin Brace: Re: Xilinx programmer
41812: 02/04/08: Steve Casselman: Re: Xilinx programmer
41831: 02/04/09: Russell: Re: Xilinx programmer
41765: 02/04/07: Rene Tschaggelar: Re: 32 bit accumulator/comparator PWM?
41768: 02/04/07: Matthew Plante: signal delay in altera 20KE
41771: 02/04/07: Peter Alfke: Re: signal delay in altera 20KE
41772: 02/04/07: Matthew Plante: Re: signal delay in altera 20KE
41775: 02/04/08: Peter Alfke: Re: signal delay in altera 20KE
41786: 02/04/08: Paul Baxter: Re: signal delay in altera 20KE
41781: 02/04/08: rjshaw: Re: signal delay in altera 20KE
41774: 02/04/08: Kelvin Xu Qijun: Modelsim-XE fails when simulating a VHDL model.
41787: 02/04/08: Kevin Brace: Re: Modelsim-XE fails when simulating a VHDL model.
41788: 02/04/08: Richard Schwarz: FPGA HDL APS Newsletter released
41790: 02/04/08: Itsaso Zuazua: Modelsim from Altera vs Modelsim from Menthors
41791: 02/04/08: Paul Baxter: Re: Modelsim from Altera vs Modelsim from Menthors
41801: 02/04/08: Kevin Brace: Re: Modelsim from Altera vs Modelsim from Menthors
41818: 02/04/08: Mike Treseler: Re: Modelsim from Altera vs Modelsim from Menthors
41794: 02/04/08: Muthu: Asynchronous FIFO from xilinx's Core Generator??
41795: 02/04/08: gianzi: XST Synthesis tool
41802: 02/04/08: Kevin Brace: Re: XST Synthesis tool
41807: 02/04/08: Falk Brunner: Re: XST Synthesis tool
41817: 02/04/08: Tim: Re: XST Synthesis tool
41821: 02/04/08: Mike Treseler: Re: XST Synthesis tool
41822: 02/04/08: Kamal Patel: Re: XST Synthesis tool
41797: 02/04/08: Martin Thompson: Variable phase-shift
41798: 02/04/08: Austin Lesea: Re: Variable phase-shift
41799: 02/04/08: Peter Lang: How to use Block-Ram via VHDL
41804: 02/04/08: Chip Fox: How to INIT ROM in VHDL for WebPack/ModelSimXE?
41844: 02/04/09: Philip Freidin: Re: How to INIT ROM in VHDL for WebPack/ModelSimXE?
41867: 02/04/09: Chip Fox: Re: How to INIT ROM in VHDL for WebPack/ModelSimXE?
41811: 02/04/08: Steve: W2000 HotFix Xilinx compatible?
41813: 02/04/08: Steve: Re: W2000 HotFix Xilinx compatible?
41816: 02/04/08: Frank de Groot: Low-cost FPGA + processor board?
41827: 02/04/08: Kevin Brace: Re: Low-cost FPGA + processor board?
41828: 02/04/09: Frank de Groot: Re: Low-cost FPGA + processor board?
41841: 02/04/08: Kevin Brace: Re: Low-cost FPGA + processor board?
41846: 02/04/09: Steve Casselman: Re: Low-cost FPGA + processor board?
41888: 02/04/10: Frank de Groot: Re: Low-cost FPGA + processor board?
41897: 02/04/10: Steve Casselman: Re: Low-cost FPGA + processor board?
41900: 02/04/10: Ulf Samuelsson: Re: Low-cost FPGA + processor board?
41902: 02/04/10: Falk Brunner: Re: Low-cost FPGA + processor board?
41904: 02/04/10: Kevin Brace: Re: Low-cost FPGA + processor board?
41910: 02/04/10: Frank de Groot: Re: Low-cost FPGA + processor board?
41947: 02/04/11: Falk Brunner: Re: Low-cost FPGA + processor board?
41928: 02/04/11: Hal Murray: Re: Low-cost FPGA + processor board?
41951: 02/04/11: Frank de Groot: Re: Low-cost FPGA + processor board?
41955: 02/04/11: Kevin Brace: Re: Low-cost FPGA + processor board?
41967: 02/04/11: Andreas Ehliar: Re: Low-cost FPGA + processor board?
42011: 02/04/12: Frank de Groot: Re: Low-cost FPGA + processor board?
42020: 02/04/12: Metastabl: Re: Low-cost FPGA + processor board?
41856: 02/04/09: Andrew Bridger: Re: Low-cost FPGA + processor board?
41860: 02/04/09: Frank de Groot: Re: Low-cost FPGA + processor board?
41863: 02/04/09: Steven Derrien: Re: Low-cost FPGA + processor board?
41909: 02/04/10: Frank de Groot: Re: Low-cost FPGA + processor board?
41865: 02/04/09: Steve Casselman: Re: Low-cost FPGA + processor board?
41868: 02/04/09: Frank de Groot: Re: Low-cost FPGA + processor board?
41871: 02/04/09: Tim: Re: Low-cost FPGA + processor board?
41874: 02/04/09: Steve Casselman: Re: Low-cost FPGA + processor board?
41878: 02/04/09: ssy: Re: Low-cost FPGA + processor board?
41879: 02/04/10: Steve Casselman: Re: Low-cost FPGA + processor board?
41884: 02/04/10: ssy: Re: Low-cost FPGA + processor board?
41919: 02/04/10: Metastabl: Re: Low-cost FPGA + processor board?
41948: 02/04/11: Steve Casselman: Re: Low-cost FPGA + processor board?
41965: 02/04/11: Metastabl: Re: Low-cost FPGA + processor board?
41819: 02/04/08: al: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41820: 02/04/08: Austin Lesea: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41823: 02/04/08: al: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41824: 02/04/08: Austin Lesea: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41825: 02/04/08: Kevin Brace: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41829: 02/04/08: Theron Hicks (Terry): Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41845: 02/04/08: Kevin Brace: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41857: 02/04/09: Theron Hicks: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41976: 02/04/12: Ray Andraka: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41977: 02/04/12: Phil Hays: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41988: 02/04/12: Theron Hicks: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42004: 02/04/12: Ray Andraka: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42033: 02/04/13: Eric Smith: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42118: 02/04/16: Brian Philofsky: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42298: 02/04/19: Tullio Grassi: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42909: 02/05/06: Ray Andraka: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42432: 02/04/24: Rick Filipkiewicz: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41826: 02/04/08: John_H: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41832: 02/04/09: Russell: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41848: 02/04/08: Xilinx FAE from Insight SANKET: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41835: 02/04/09: Kevin Neilson: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41843: 02/04/09: Ray Andraka: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42149: 02/04/17: andreas: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42170: 02/04/17: Brian Philofsky: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
42433: 02/04/24: Rick Filipkiewicz: Re: bad experience with Xilinx ISE 4.1i and Xilinx hotline suppot
41830: 02/04/09: RAcoops: Xilinx Prototype Platforms
41833: 02/04/08: Kevin Brace: Re: Xilinx Prototype Platforms
41836: 02/04/09: RAcoops: Re: Xilinx Prototype Platforms
41838: 02/04/08: Kevin Brace: Re: Xilinx Prototype Platforms
41853: 02/04/09: Christopher Saunter: Re: Xilinx Prototype Platforms
41837: 02/04/08: mm: where can i find service pack 7 for xilinx foundation 3.1i??
41839: 02/04/08: strut911: equivalence checking with FPGA
41842: 02/04/09: John E. Derrick: Re: equivalence checking with FPGA
41953: 02/04/11: Masood Makkar: Re: equivalence checking with FPGA
41840: 02/04/08: strut911: uniquifying a synplicity netlist
41866: 02/04/09: John_H: Re: uniquifying a synplicity netlist
41877: 02/04/09: strut911: Re: uniquifying a synplicity netlist
42582: 02/04/28: Rick Filipkiewicz: Re: uniquifying a synplicity netlist
41847: 02/04/08: qysheng: virtexe pin problem
41880: 02/04/09: Peter Alfke: Re: virtexe pin problem
41849: 02/04/09: Andreas Koschak: Modelsim XE can't handle Clock Dividers with CLKDLL
41850: 02/04/09: K PRASAD: regarding gate count of the design
41930: 02/04/11: Magnus Homann: Re: regarding gate count of the design
41852: 02/04/09: Antonio Mart?nez ƒ`lvarez: Compiling the addone.c example from DK1
41895: 02/04/10: JMN: Re: Compiling the addone.c example from DK1
41854: 02/04/09: Itsaso Zuazua: Post-synthesis simulation errors with Modelsim
41855: 02/04/09: V Crabtree: Kanda AT40K STarter Kit help
41859: 02/04/09: David Brown: Command-line Verifying Verilog with Synplify
41873: 02/04/09: strut911: Re: Command-line Verifying Verilog with Synplify
41885: 02/04/10: David Brown: Re: Command-line Verifying Verilog with Synplify
41861: 02/04/09: Gunther May: Freeware EDIF viewer
42513: 02/04/26: Tim: Re: Freeware EDIF viewer
42542: 02/04/26: Paulo Dutra: Re: Freeware EDIF viewer
43326: 02/05/19: Matt van de Werken: Re: Freeware EDIF viewer
41862: 02/04/09: C.W. THomas: Tying Virtex II unused pins to GND???
41872: 02/04/09: Tim: Re: Tying Virtex II unused pins to GND???
41864: 02/04/09: Philippe Robert: Excel Sheet for Virtex-II power estimation
41886: 02/04/10: Andy Dow: Re: Excel Sheet for Virtex-II power estimation
41876: 02/04/09: luigi funes: differences betw. EPF10K30E and EP1K30?
41882: 02/04/10: Martin Thompson: Re: differences betw. EPF10K30E and EP1K30?
41898: 02/04/10: Mike Treseler: Re: differences betw. EPF10K30E and EP1K30?
41881: 02/04/09: jeff: Need help with Insight Spartan II demo board and the counter demo.
41901: 02/04/10: Falk Brunner: Re: Need help with Insight Spartan II demo board and the counter demo.
41927: 02/04/10: jeff: Re: Need help with Insight Spartan II demo board and the counter demo.
41946: 02/04/11: Falk Brunner: Re: Need help with Insight Spartan II demo board and the counter demo.
41925: 02/04/10: jeff: Re: Need help with Insight Spartan II demo board and the counter demo.
42134: 02/04/16: Brendan Bridgford: Re: Need help with Insight Spartan II demo board and the counter demo.
42259: 02/04/18: jeff: Update -- Need help with Insight Spartan II demo board and the counter demo.
42261: 02/04/19: Kevin Brace: Re: Update -- Need help with Insight Spartan II demo board and the
42262: 02/04/18: jeff: Re: Update -- Need help with Insight Spartan II demo board and the counter demo.
41883: 02/04/10: Bert Cuzeau: Checking Synthesis tools.
41889: 02/04/10: sweir: Re: Checking Synthesis tools.
41892: 02/04/10: Bert Cuzeau: Re: Checking Synthesis tools.
41907: 02/04/10: sweir: Re: Checking Synthesis tools.
41908: 02/04/10: Paul Butler: Re: Checking Synthesis tools.
41914: 02/04/10: sweir: Re: Checking Synthesis tools.
41935: 02/04/11: Paul Butler: Re: Checking Synthesis tools.
41962: 02/04/11: sweir: Re: Checking Synthesis tools.
41887: 02/04/10: Sujatha Sriram: FPGA Partioning
41890: 02/04/10: luigi funes: Re: FPGA Partioning
41893: 02/04/10: John_H: Re: FPGA Partioning
42183: 02/04/17: Akash Rai: Re: FPGA Partioning
41891: 02/04/10: Jon Schneider: Webpack XST broken
41912: 02/04/10: Kevin Brace: Re: Webpack XST broken
41894: 02/04/10: Frank Zampa: [OT] Implement buffers in CPLD.
41903: 02/04/10: Falk Brunner: Re: [OT] Implement buffers in CPLD.
41896: 02/04/10: C.W. THomas: DLC4 Download cable question
41899: 02/04/10: almost_a_gnome: shift registers using virtex block RAM
41974: 02/04/12: Philip Freidin: Re: shift registers using virtex block RAM
41905: 02/04/10: almost_a_gnome: Initializing the ram values on virtex.
41918: 02/04/11: Philip Freidin: Re: Initializing the ram values on virtex.
41913: 02/04/10: Andrew Bridger: ChipScope ILA, cable requirements
41916: 02/04/10: Steve Casselman: Re: ChipScope ILA, cable requirements
41921: 02/04/10: Jason Moore: Re: ChipScope ILA, cable requirements
42583: 02/04/28: Rick Filipkiewicz: Re: ChipScope ILA, cable requirements
41920: 02/04/10: Max Edmand: Built in multipliers in Virtex 2000E?
41923: 02/04/11: Kevin Neilson: Re: Built in multipliers in Virtex 2000E?
41970: 02/04/12: Ray Andraka: Re: Built in multipliers in Virtex 2000E?
42022: 02/04/13: Kevin Neilson: Re: Built in multipliers in Virtex 2000E?
42024: 02/04/13: Ray Andraka: Re: Built in multipliers in Virtex 2000E?
41931: 02/04/11: Magnus Homann: Re: Built in multipliers in Virtex 2000E?
41924: 02/04/11: Bob Perlman: ChipScope Speed
41926: 02/04/11: Hal Murray: Re: ChipScope Speed
42012: 02/04/12: A Random Mike: Re: ChipScope Speed
41929: 02/04/11: Itsaso Zuazua: A learner of Modelsim
41932: 02/04/11: Mot: How can I devide bit_vectors?
41933: 02/04/11: Christof Paar: CHES 2002 --- Final CFP
41934: 02/04/11: Aleksei Chistyakov: ASIC vs FPGA compare topic
41936: 02/04/11: Jon Schneider: Webpack 4.2 checksums
41937: 02/04/11: Markus Meng: HDLC Controller Design
41939: 02/04/11: Vikram Pasham: Re: HDLC Controller Design
41952: 02/04/11: Allan Herriman: Re: HDLC Controller Design
41938: 02/04/11: Cyrille de Brébisson: Availability of Virtex II pro
42297: 02/04/19: Tullio Grassi: Re: Availability of Virtex II pro
41940: 02/04/11: Martin Thompson: Attributes *and* generics!?
41944: 02/04/11: Jonathan Swift: Re: Attributes *and* generics!?
41964: 02/04/11: Mike Treseler: Re: Attributes *and* generics!?
41971: 02/04/12: Ray Andraka: Re: Attributes *and* generics!?
41983: 02/04/12: Martin Thompson: Re: Attributes *and* generics!?
41998: 02/04/12: Ray Andraka: Re: Attributes *and* generics!?
42068: 02/04/15: Martin Thompson: Re: Attributes *and* generics!?
42046: 02/04/13: Mike Treseler: Re: Attributes *and* generics!?
42069: 02/04/15: Martin Thompson: Re: Attributes *and* generics!?
42043: 02/04/13: Mike Treseler: Re: Attributes *and* generics!?
41941: 02/04/11: Martin Czamai: Insight service and PCI demo board question
41957: 02/04/11: Kevin Brace: Re: Insight service and PCI demo board question
41959: 02/04/11: Speedy Zero Two: Re: Insight service and PCI demo board question
41963: 02/04/11: Kevin Brace: Re: Insight service and PCI demo board question
41984: 02/04/12: Martin Czamai: Re: Insight service and PCI demo board question
41942: 02/04/11: Herbie: Destroying Xilinx xc4000 etc
41945: 02/04/11: Jonathan Swift: Re: Destroying Xilinx xc4000 etc
42550: 02/04/27: Rissa Tero: Re: Destroying Xilinx xc4000 etc
41943: 02/04/11: Stefano M: iMPACT FPGA detection error
41958: 02/04/11: Steve Casselman: Re: iMPACT FPGA detection error
41972: 02/04/12: Ray Andraka: Re: iMPACT FPGA detection error
42072: 02/04/15: MICHAEL ALEX: Re: iMPACT FPGA detection error
42196: 02/04/18: Stefano M: Re: iMPACT FPGA detection error
41949: 02/04/11: Jim Raynor: Price List ?
41950: 02/04/11: Alan Nishioka: Re: Price List ?
41954: 02/04/11: Theron Hicks: Re: Price List ?
41956: 02/04/11: Georg Acher: Re: Price List ?
41990: 02/04/12: Falk Brunner: Re: Price List ?
42015: 02/04/12: Petter Gustad: Re: Price List ?
42016: 02/04/12: Peter Alfke: Re: Price List ?
42597: 02/04/29: dMon: Re: Price List ?
41960: 02/04/11: Cyrille de Brébisson: Difference between the Virtex and the Virtex II
42000: 02/04/12: Jason Zimmernann: Re: Difference between the Virtex and the Virtex II
41961: 02/04/11: Jason Zimmernann: PCI Bridge Question
41980: 02/04/12: Kevin Brace: Re: PCI Bridge Question
41999: 02/04/12: Jason Zimmernann: Re: PCI Bridge Question
42001: 02/04/12: Eric Crabill: Re: PCI Bridge Question
42009: 02/04/12: Kevin Brace: Re: PCI Bridge Question
42027: 02/04/13: Ray Andraka: Re: PCI Bridge Question
42045: 02/04/13: Kevin Brace: Re: PCI Bridge Question
55390: 03/05/07: x: Re: PCI Bridge Question
41966: 02/04/11: Gil Herbeck: prototyping an ASIC
41968: 02/04/11: Kevin Brace: Re: prototyping an ASIC
41969: 02/04/12: Gil Herbeck: Re: prototyping an ASIC
41973: 02/04/11: Kevin Brace: Re: prototyping an ASIC
41975: 02/04/12: Gil Herbeck: Re: prototyping an ASIC
41979: 02/04/12: John E. Derrick: Re: prototyping an ASIC
41981: 02/04/12: Gil Herbeck: Re: prototyping an ASIC
41987: 02/04/12: chris: Re: prototyping an ASIC
42002: 02/04/12: Gil Herbeck: Re: prototyping an ASIC
42051: 02/04/14: John E. Derrick: Re: prototyping an ASIC
41989: 02/04/12: Peter Ormsby: Re: prototyping an ASIC
42003: 02/04/12: Gil Herbeck: Re: prototyping an ASIC
42021: 02/04/12: chris: Re: prototyping an ASIC
42245: 02/04/18: Jay: Re: prototyping an ASIC
42041: 02/04/13: Ken McElvain: Re: prototyping an ASIC
41978: 02/04/11: K PRASAD: regarding synthesis of signal and variable
41985: 02/04/12: Alan Fitch: Re: regarding synthesis of signal and variable
42264: 02/04/19: K PRASAD: Re: regarding synthesis of signal and variable
42273: 02/04/19: Alan Fitch: Re: regarding synthesis of signal and variable
41982: 02/04/12: Matjaz Finc: problems with Nios 2.0
41986: 02/04/12: Paul Baxter: Re: problems with Nios 2.0
42092: 02/04/15: Jesse Kempa: Re: problems with Nios 2.0
42106: 02/04/16: Matjaz Finc: Re: problems with Nios 2.0
42116: 02/04/16: Kerri Golden: Re: problems with Nios 2.0
42204: 02/04/18: Matjaz Finc: Re: problems with Nios 2.0
42117: 02/04/16: Kerri Golden: Re: problems with Nios 2.0
41991: 02/04/12: Greg: DDR SDRAM Controller
41994: 02/04/12: name: Re: DDR SDRAM Controller
41995: 02/04/12: John_H: Re: DDR SDRAM Controller
42013: 02/04/12: Spam Hater: Re: DDR SDRAM Controller
42758: 02/05/02: kim: Re: DDR SDRAM Controller
41996: 02/04/12: Spam Hater: Re: DDR SDRAM Controller
41992: 02/04/12: Sean: Need help with Spartan2 and ISA bus interface please.
41997: 02/04/12: Spam Hater: Re: Need help with Spartan2 and ISA bus interface please.
41993: 02/04/12: Brian Kane: Call For Papers - Boston Synopsys Users' Group
42005: 02/04/12: Max Edmand: "Creat RPM" in Core Generator?
42014: 02/04/12: dmac: Re: "Creat RPM" in Core Generator?
42008: 02/04/12: Anna Acevedo: Re: FPGA eval/dev boards with *serial* interface?
42061: 02/04/14: Tom Loredo: Re: FPGA eval/dev boards with *serial* interface?
42010: 02/04/12: Tom Loredo: FPGA eval/dev boards with *serial* interface?
42028: 02/04/13: Ray Andraka: Re: FPGA eval/dev boards with *serial* interface?
42054: 02/04/14: Falk Brunner: Re: FPGA eval/dev boards with *serial* interface?
42066: 02/04/15: Felix Bertram: Re: FPGA eval/dev boards with *serial* interface?
42071: 02/04/15: Wolfgang Loewer: Re: FPGA eval/dev boards with *serial* interface?
42089: 02/04/15: Tom Loredo: Re: FPGA eval/dev boards with *serial* interface?
42017: 02/04/12: Nicholas Weaver: Stupid .ngd file questions....
42019: 02/04/13: Steve Casselman: Re: Stupid .ngd file questions....
42029: 02/04/13: Philip Freidin: Re: Stupid .ngd file questions....
42023: 02/04/13: Digital EE: Xilinx FPGA load - XAPP 502
42081: 02/04/15: Mark Ng: Re: Xilinx FPGA load - XAPP 502
42030: 02/04/13: George Hodges: Slave serial loading of spartan II bitstream
42034: 02/04/13: Tim: Re: Slave serial loading of spartan II bitstream
42042: 02/04/13: Philip Freidin: Re: Slave serial loading of spartan II bitstream
42031: 02/04/13: crackeur: webpack ISE
42044: 02/04/13: Kevin Brace: Re: webpack ISE
42032: 02/04/13: Norman Yang: DLL property control in UCF
42055: 02/04/14: Falk Brunner: Re: DLL property control in UCF
42064: 02/04/15: Norman Yang: Re: DLL property control in UCF
42122: 02/04/16: Brian Philofsky: Re: DLL property control in UCF
42070: 02/04/15: H.L: Re: DLL property control in UCF
42085: 02/04/15: Carlton Blow: Re: DLL property control in UCF
42090: 02/04/15: Falk Brunner: Re: DLL property control in UCF
42035: 02/04/13: Tim: Re: new to fpga's need insight
42036: 02/04/13: Neil Franklin: Re: new to fpga's need insight
42038: 02/04/13: Neil Franklin: Re: new to fpga's need insight
42039: 02/04/13: akhar: Re: new to fpga's need insight
42040: 02/04/13: Phil Hays: Re: new to fpga's need insight
42048: 02/04/13: Peter Alfke: Re: new to fpga's need insight
42080: 02/04/15: Pete Koziar: Re: new to fpga's need insight
42088: 02/04/15: Phil James-Roxby: Re: new to fpga's need insight
42047: 02/04/13: Kevin Brace: Re: new to fpga's need insight
42049: 02/04/13: Lasse Langwadt Christensen: virtex2 bufgce or not bufgce
42059: 02/04/14: Jeff Mock: Re: virtex2 bufgce or not bufgce
42067: 02/04/15: Lasse Langwadt Christensen: Re: virtex2 bufgce or not bufgce
42078: 02/04/15: John_H: Re: virtex2 bufgce or not bufgce
42050: 02/04/13: Kevin Hansen: Xilinx JTAG C Source
42053: 02/04/14: Falk Brunner: Re: Xilinx JTAG C Source
42123: 02/04/16: Neil Glenn Jacobson: Re: Xilinx JTAG C Source
42126: 02/04/16: Neil Glenn Jacobson: Re: Xilinx JTAG C Source (Again)
42052: 02/04/14: Jon Schneider: Odd problem shows on post XST/translate simulation
42058: 02/04/14: Kevin Brace: Re: Odd problem shows on post XST/translate simulation
42063: 02/04/14: Andrew Bridger: Using SRL16E Xilinx primitive.
42075: 02/04/15: Jonathan Swift: Re: Using SRL16E Xilinx primitive.
42083: 02/04/15: Carlton Blow: Re: Using SRL16E Xilinx primitive.
42101: 02/04/15: Andrew Bridger: Re: Using SRL16E Xilinx primitive.
42112: 02/04/16: Austin Lesea: Re: Using SRL16E Xilinx primitive.
42146: 02/04/16: Andrew Bridger: Re: Using SRL16E Xilinx primitive.
42065: 02/04/15: Phil Hays: Re: "free" tools ... ?
42073: 02/04/15: <vlad@comsys.ntu-kpi.kiev.ua>: JTAG cable and iMPACT
42086: 02/04/15: Pete Koziar: Re: JTAG cable and iMPACT
42104: 02/04/16: Vladislav Vasielnko: Re: JTAG cable and iMPACT
42095: 02/04/15: Michol Bauer: Re: JTAG cable and iMPACT
42102: 02/04/16: Jon Schneider: Re: JTAG cable and iMPACT
42153: 02/04/17: MICHAEL ALEX: Re: JTAG cable and iMPACT
42186: 02/04/18: Jon Schneider: Re: JTAG cable and iMPACT
42105: 02/04/16: Vladislav Vasielnko: Re: JTAG cable and iMPACT
42074: 02/04/15: Frank Zampa: Configuring XIlinx XL Fpga with no XL PROM.
42076: 02/04/15: Jonathan Swift: Re: Configuring XIlinx XL Fpga with no XL PROM.
42077: 02/04/15: Pete Koziar: Xilinx BSCAN_SPARTAN2 component
42093: 02/04/15: Mike: Re: Xilinx BSCAN_SPARTAN2 component
42110: 02/04/16: Pete Koziar: Re: Xilinx BSCAN_SPARTAN2 component
42082: 02/04/15: Craig Ward: XilinX Jtag Cable available in UK.
42084: 02/04/15: Jim Raynor: FPGA parameters
42087: 02/04/15: Peter Alfke: Re: FPGA parameters
42091: 02/04/15: Kevin Neilson: Re: FPGA parameters
42094: 02/04/15: Carlton Blow: Re: FPGA parameters
42096: 02/04/15: Kevin Hansen: JTAG 1532 BSDL Files for xc95xxxxl
42097: 02/04/16: Spam Hater: Looking for SpartanXL demo board
42098: 02/04/15: Kevin Brace: Re: Looking for SpartanXL demo board
42150: 02/04/17: Spam Hater: Re: Looking for SpartanXL demo board
42109: 02/04/16: Johann Glaser: Re: Looking for SpartanXL demo board
42212: 02/04/18: Spam Hater: Re: Looking for SpartanXL demo board
42336: 02/04/21: MICHAEL ALEX: Re: Looking for SpartanXL demo board
42099: 02/04/15: mm: why does my counter pause while its enable signal is still active?
42100: 02/04/15: Kevin Brace: Re: why does my counter pause while its enable signal is still active?
42103: 02/04/16: Phil Hays: Re: OT? - Comments on "The Death of Hardware Engineering"
42107: 02/04/16: Mats Brorsson: Source code for a NIOS instruction set simulator?
42148: 02/04/17: Johnsonw10: Re: Source code for a NIOS instruction set simulator?
42289: 02/04/19: Matthew Mahr: Re: Source code for a NIOS instruction set simulator?
42293: 02/04/19: Mark Aaldering: Re: Source code for a NIOS instruction set simulator?
42309: 02/04/20: Tim: Re: Source code for a NIOS instruction set simulator?
42313: 02/04/19: crob: Re: Source code for a NIOS instruction set simulator?
42314: 02/04/19: Mark Aaldering: was: NIOS ISS, MicroBlaze Cycle Accurate ISS
42357: 02/04/21: Peter Ormsby: Re: NIOS ISS, MicroBlaze Cycle Accurate ISS
42390: 02/04/22: Mark Aaldering: Re: NIOS ISS, MicroBlaze Cycle Accurate ISS
42384: 02/04/22: crob: Re: was: NIOS ISS, MicroBlaze Cycle Accurate ISS
42317: 02/04/20: Mats Brorsson: Re: Source code for a NIOS instruction set simulator?
42108: 02/04/16: Vladislav Vasielnko: Power supply pins
42114: 02/04/16: Peter Alfke: Re: Power supply pins
42121: 02/04/16: Vladislav Vasilenko: Re: Power supply pins
42129: 02/04/16: Falk Brunner: Re: Power supply pins
42111: 02/04/16: Pete Koziar: Reconfiguring Spartan II after boot-up
42128: 02/04/16: Falk Brunner: Re: Reconfiguring Spartan II after boot-up
42166: 02/04/17: Pete Koziar: Re: Reconfiguring Spartan II after boot-up
42169: 02/04/17: rickman: Re: Reconfiguring Spartan II after boot-up
42178: 02/04/17: Peter Alfke: Re: Reconfiguring Spartan II after boot-up
42113: 02/04/16: Pete Koziar: Command-line utility for loading Xilinx XC9572XL and Spartan II via JTAG
42132: 02/04/16: Petter Gustad: Re: Command-line utility for loading Xilinx XC9572XL and Spartan II via JTAG
42167: 02/04/17: Pete Koziar: Re: Command-line utility for loading Xilinx XC9572XL and Spartan II via JTAG
42115: 02/04/16: kn: Need Help to Implement Div Operation
42120: 02/04/16: Peter Alfke: Re: Need Help to Implement Div Operation
42137: 02/04/16: Speedy Zero Two: Re: Need Help to Implement Div Operation
42119: 02/04/16: Theron Hicks: creating my own RPMs(?) or similar
42133: 02/04/16: Theron Hicks: Re: creating my own hard macro or similar
42135: 02/04/16: Bret Wade: Re: creating my own hard macro or similar
42138: 02/04/16: Theron Hicks: Re: creating my own hard macro or similar
42812: 02/05/03: Russell: Re: creating my own hard macro or similar
42813: 02/05/03: Stephan Neuhold: Re: creating my own hard macro or similar
42141: 02/04/16: Ray Andraka: Re: creating my own RPMs(?) or similar
42124: 02/04/16: Apeak: Synario v2.3
42144: 02/04/17: Jim Granville: Re: Synario v2.3
42125: 02/04/16: Prashant: Programming for FPGA or ASIC
42174: 02/04/17: Hari Devanath: Re: Programming for FPGA or ASIC
42210: 02/04/18: Prashant: Re: Programming for FPGA or ASIC
42270: 02/04/19: Damir Danijel Zagar: Re: Programming for FPGA or ASIC
42130: 02/04/16: Cyrille de Brébisson: Virtex Development Board with a 4M or more gates
42151: 02/04/17: Vincent Vendramini: Re: Virtex Development Board with a 4M or more gates
42159: 02/04/17: Eric Pearson: Re: Virtex Development Board with a 4M or more gates
42155: 02/04/17: Graham Smart: Re: Virtex Development Board with a 4M or more gates
42131: 02/04/16: Kent Krumvieda: GPGA GPS Cores
42136: 02/04/16: Sean: IO Standards supported in Spartan-II devices
42139: 02/04/16: Kevin Brace: Re: IO Standards supported in Spartan-II devices
42140: 02/04/16: Kevin Brace: A problem with PAR in ISE WebPACK 4.2
42142: 02/04/16: VP: Telecom Bus info
42184: 02/04/18: sweir: Re: Telecom Bus info
42211: 02/04/18: Kris Vorwerk: Re: Telecom Bus info
42143: 02/04/16: Steve Casselman: Beta Testers Need for HOTMan
42145: 02/04/16: John Larkin: FPGA Timing Problem
42147: 02/04/17: Leo Havm?ller: Re: FPGA Timing Problem
42154: 02/04/17: MICHAEL ALEX: Re: FPGA Timing Problem
42162: 02/04/17: Austin Lesea: Re: FPGA Timing Problem
42164: 02/04/17: Spam Hater: Re: FPGA Timing Problem
42181: 02/04/18: Ray Andraka: Re: FPGA Timing Problem
42239: 02/04/18: Jay: Re: FPGA Timing Problem
42152: 02/04/17: Vaggelis Tripolitakis: problem installing xilinx foundation 3.1 on a P4
42173: 02/04/17: Hari Devanath: Re: problem installing xilinx foundation 3.1 on a P4
42176: 02/04/18: Vaggelis Tripolitakis: Re: problem installing xilinx foundation 3.1 on a P4
42234: 02/04/18: Hari Devanath: Re: problem installing xilinx foundation 3.1 on a P4
42253: 02/04/19: Tim: Re: problem installing xilinx foundation 3.1 on a P4
43057: 02/05/10: Greg: Re: problem installing xilinx foundation 3.1 on a P4
42156: 02/04/17: William L Hunter Jr: GND Outputs being optimized out using FPGA Express 3.6.1 in ISE4.2.01
42157: 02/04/17: Paul Baxter: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in ISE4.2.01
42168: 02/04/17: Austin Lesea: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in
42171: 02/04/17: Falk Brunner: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in ISE4.2.01
42180: 02/04/18: William L Hunter Jr: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in ISE4.2.01
42209: 02/04/18: Austin Lesea: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in
42252: 02/04/18: Jay: Re: GND Outputs being optimized out using FPGA Express 3.6.1 in ISE4.2.01
42158: 02/04/17: Andrew Xiang: does multilinx driver work on winxp?
42389: 02/04/22: Victor Schutte: Re: Nios 2.0 problem
42161: 02/04/17: Itsaso Zuazua: Problems with Nios 2.0
42172: 02/04/17: James Srinivasan: Re: Problems with Nios 2.0
42175: 02/04/17: crob: Re: Problems with Nios 2.0
42163: 02/04/17: Itsaso Zuazua: Knowing the design from the compilation report
42165: 02/04/17: Kent Krumvieda: VHDL or Verilog SW to implement GPS receiver on FPGA
42185: 02/04/18: Itsaso Zuazua: problems with Nios 2.0
42187: 02/04/18: Sujatha Sriram: FPGA limitation
42189: 02/04/18: Steffen Thieringer: 8051 Core for Motor Electronics
42192: 02/04/18: Russell: Re: 8051 Core for Motor Electronics
42198: 02/04/18: Steffen Thieringer: Re: 8051 Core for Motor Electronics
42201: 02/04/18: Russell: Re: 8051 Core for Motor Electronics
42205: 02/04/18: Steffen Thieringer: Re: 8051 Core for Motor Electronics
42208: 02/04/18: Russell: Re: 8051 Core for Motor Electronics
42214: 02/04/18: Felix Bertram: Re: 8051 Core for Motor Electronics
42224: 02/04/18: Falk Brunner: Re: 8051 Core for Motor Electronics
42353: 02/04/21: Peter Wallace: Re: 8051 Core for Motor Electronics
42372: 02/04/22: Klaus-Guenter Leiss: Re: 8051 Core for Motor Electronics
42231: 02/04/19: Jim Granville: Re: 8051 Core for Motor Electronics
42243: 02/04/18: Philip Freidin: Re: 8051 Core for Motor Electronics
42249: 02/04/19: Ulf Samuelsson: Re: 8051 Core for Motor Electronics
42269: 02/04/19: Klaus-Guenter Leiss: Re: 8051 Core for Motor Electronics
42546: 02/04/27: Jim Granville: Re: 8051 Core for Motor Electronics
42190: 02/04/18: Eric Kral: Bidirectionnal bus...multiple sources driving the same signal...
42215: 02/04/18: Falk Brunner: Re: Bidirectionnal bus...multiple sources driving the same signal...
42217: 02/04/18: Eric Crabill: Re: Bidirectionnal bus...multiple sources driving the same signal...
42194: 02/04/18: UK Gary: 1000 I/O Pins -- What is cheapest FPGA?
42195: 02/04/18: Paul Baxter: Re: 1000 I/O Pins -- What is cheapest FPGA?
42202: 02/04/18: UK Gary: Re: 1000 I/O Pins -- What is cheapest FPGA?
42199: 02/04/18: Steffen Thieringer: Re: 1000 I/O Pins -- What is cheapest FPGA?
42207: 02/04/18: Sum: Re: 1000 I/O Pins -- What is cheapest FPGA?
42218: 02/04/18: Peter Alfke: Re: 1000 I/O Pins -- What is cheapest FPGA?
42225: 02/04/18: Falk Brunner: Re: 1000 I/O Pins -- What is cheapest FPGA?
42248: 02/04/18: John_H: Re: 1000 I/O Pins -- What is cheapest FPGA?
42229: 02/04/18: Jay: Re: 1000 I/O Pins -- What is cheapest FPGA?
42235: 02/04/18: Tim: Re: 1000 I/O Pins -- What is cheapest FPGA?
42237: 02/04/18: Nicholas Weaver: Re: 1000 I/O Pins -- What is cheapest FPGA?
42238: 02/04/18: Austin Lesea: Re: 1000 I/O Pins -- What is cheapest FPGA?
42258: 02/04/19: Nicholas Weaver: Re: 1000 I/O Pins -- What is cheapest FPGA?
42279: 02/04/19: Austin Lesea: Re: 1000 I/O Pins -- What is cheapest FPGA?
42285: 02/04/19: Georg Acher: Re: 1000 I/O Pins -- What is cheapest FPGA?
42290: 02/04/19: Falk Brunner: Re: 1000 I/O Pins -- What is cheapest FPGA?
42301: 02/04/19: Nicholas Weaver: Re: 1000 I/O Pins -- What is cheapest FPGA?
42320: 02/04/20: Hal Murray: Re: 1000 I/O Pins -- What is cheapest FPGA?
42907: 02/05/06: Ray Andraka: Re: 1000 I/O Pins -- What is cheapest FPGA?
42303: 02/04/19: Nicholas Weaver: Re: 1000 I/O Pins -- What is cheapest FPGA?
42306: 02/04/19: =?iso-8859-1?Q?Cyrille_de_Br=E9bisson?=: Re: 1000 I/O Pins -- What is cheapest FPGA?. What about Route and place needs
42308: 02/04/19: John_H: Re: 1000 I/O Pins -- What is cheapest FPGA?. What about Route and place
42233: 02/04/18: Nicholas Weaver: Re: 1000 I/O Pins -- What is cheapest FPGA?
42250: 02/04/18: John_H: Re: 1000 I/O Pins -- What is cheapest FPGA?
42197: 02/04/18: Stefano M: Schematic editor and module descriptions
42244: 02/04/18: Philip Freidin: Re: Schematic editor and module descriptions
42206: 02/04/18: Tsoi Kuen Hung: [Xilinx TRACE timing] two phase clock
42284: 02/04/19: Tsoi Kuen Hung: Re: [Xilinx TRACE timing] two phase clock
42213: 02/04/18: mm: how comes the clk suddenly pause?
42223: 02/04/18: Wayne: Re: how comes the clk suddenly pause?
42338: 02/04/21: mm: Re: how comes the clk suddenly pause?
42216: 02/04/18: Falk Brunner: Understanding clock routing (or not)
42220: 02/04/18: Peter Alfke: Re: Understanding clock routing (or not)
42246: 02/04/18: John_H: Re: Understanding clock routing (or not)
42260: 02/04/18: Jeff Mock: Re: Understanding clock routing (or not)
42263: 02/04/19: =?ISO-8859-1?Q?S=F8ren_A.M=F8ller?=: Re: Understanding clock routing (or not)
42221: 02/04/18: Greg Neff: Xilinx Programmable World 2002 - Review
42255: 02/04/18: Peter Alfke: Re: Xilinx Programmable World 2002 - Review
42286: 02/04/19: Greg Neff: Re: Xilinx Programmable World 2002 - Review
42287: 02/04/19: Austin Lesea: Re: Xilinx Programmable World 2002 - Review
42296: 02/04/19: Tom Liehe: Re: Xilinx Programmable World 2002 - Review
42311: 02/04/20: Tim: Re: Xilinx Programmable World 2002 - Review
42378: 02/04/22: Austin Lesea: Re: Xilinx Programmable World 2002 - Review
42394: 02/04/22: Tim: Re: Xilinx Programmable World 2002 - Review
42397: 02/04/22: Austin Lesea: Re: Xilinx Programmable World 2002 - Review
42566: 02/04/27: Ray Andraka: Re: Xilinx Programmable World 2002 - Review
42315: 02/04/20: MatrixGear: Re: Xilinx Programmable World 2002 - Review
42318: 02/04/19: RS: Re: Xilinx Programmable World 2002 - Review
42379: 02/04/22: Austin Lesea: Re: Xilinx Programmable World 2002 - Review
42385: 02/04/22: Alfredo: Re: Xilinx Programmable World 2002 - Review
42612: 02/04/29: John Jakson: Re: Xilinx Programmable World 2002 - Review
42226: 02/04/18: almost_a_gnome: Addressing Error Ram on Virtex E.
42247: 02/04/18: Philip Freidin: Re: Addressing Error Ram on Virtex E.
42232: 02/04/18: Jeff Wallace: XCV812E-6BG560C - Virtex - E !!!!!!!!!
42265: 02/04/19: Philippe Robert: Virtex-II core power supply
42282: 02/04/19: Austin Lesea: Re: Virtex-II core power supply
42266: 02/04/19: H.L: virtex-e DLL and clock skew
42267: 02/04/19: H.L: Re: virtex-e DLL and clock skew
42332: 02/04/20: H.L: Re: virtex-e DLL and clock skew
42375: 02/04/22: Austin Lesea: Re: virtex-e DLL and clock skew
42271: 02/04/19: Patrik Eriksson: Using Virtex-II DCM to determine clock activity
42281: 02/04/19: Austin Lesea: Re: Using Virtex-II DCM to determine clock activity
42361: 02/04/22: Patrik Eriksson: Re: Using Virtex-II DCM to determine clock activity
42376: 02/04/22: Austin Lesea: Re: Using Virtex-II DCM to determine clock activity
42272: 02/04/19: Phil Connor: ModelSim closes for unknown reason
42277: 02/04/19: ybc: Re: ModelSim closes for unknown reason
42516: 02/04/25: SECRET: Re: ModelSim closes for unknown reason
42307: 02/04/19: Jay: Re: ModelSim closes for unknown reason
42319: 02/04/19: K PRASAD: Re: ModelSim closes for unknown reason
42374: 02/04/22: Phil Connor: Re: ModelSim closes for unknown reason
42274: 02/04/19: Marco Serafini: RAM function in Altera device
42367: 02/04/22: Graeme Gill: Re: RAM function in Altera device
42278: 02/04/19: Paulo Valentim: Simulating Unisim
42280: 02/04/19: Andrew W. Reynolds: Re: Simulating Unisim
42288: 02/04/19: gianzi: Re: Simulating Unisim
42369: 02/04/22: Renaud Pacalet: Re: Simulating Unisim
42370: 02/04/22: Jonathan Bromley: Re: Simulating Unisim
42406: 02/04/23: Paulo Valentim: Re: Simulating Unisim
42283: 02/04/19: Monsieur Le Maire: FPGA books and tutorials ....
42356: 02/04/21: Al Williams: Re: FPGA books and tutorials ....
42291: 02/04/19: VhdlCohen: Re: just bought Cohen's book...Real Chip Design and Verification using Verilog and VHDL
42292: 02/04/19: Jay: Xilinx Easypath- Selling parts with known defects
42300: 02/04/19: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42333: 02/04/20: Bob Perlman: Re: Xilinx Easypath- Selling parts with known defects
42380: 02/04/22: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42302: 02/04/19: Steve Casselman: Re: Xilinx Easypath- Selling parts with known defects
42305: 02/04/19: Johann Glaser: Re: Xilinx Easypath- Selling parts with known defects
42324: 02/04/20: Falk Brunner: Re: Xilinx Easypath- Selling parts with known defects
42328: 02/04/20: Johann Glaser: Re: Xilinx Easypath- Selling parts with known defects
42329: 02/04/20: Tim: Re: Xilinx Easypath- Selling parts with known defects
42330: 02/04/20: Phil Hays: Re: Xilinx Easypath- Selling parts with known defects
42352: 02/04/21: Jay: Re: Xilinx Easypath- Selling parts with known defects
42381: 02/04/22: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42403: 02/04/22: Jay: Re: Xilinx Easypath- Selling parts with known defects
42412: 02/04/23: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42424: 02/04/23: Tim: Re: Xilinx Easypath- Selling parts with known defects
42431: 02/04/23: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42514: 02/04/26: Tim: Re: Xilinx Easypath- Selling parts with known defects
42693: 02/05/01: Tim: Re: Xilinx Easypath- Selling parts with known defects
42646: 02/04/30: Hal Murray: Re: Xilinx Easypath- Selling parts with known defects
42656: 02/04/30: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42672: 02/05/01: Jim Granville: Re: Xilinx Easypath- Selling parts with known defects
42680: 02/04/30: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42682: 02/05/01: Jim Granville: Re: Xilinx Easypath- Selling parts with known defects
42684: 02/04/30: Nicholas Weaver: Re: Xilinx Easypath- Selling parts with known defects
42688: 02/04/30: Austin Lesea: Re: Xilinx Easypath- is it a fake?
42675: 02/04/30: Marc Randolph: Re: Xilinx Easypath- Selling parts with known defects
42683: 02/04/30: Nicholas Weaver: Placement, Retiming and Performance
42457: 02/04/24: Paul Butler: Re: Xilinx Easypath- Selling parts with known defects
42474: 02/04/24: Jay: Re: Xilinx Easypath- Selling parts with known defects
42475: 02/04/24: Austin Lesea: Re: Xilinx Easypath- Selling parts with known defects
42517: 02/04/26: Jim Granville: Re: Xilinx Easypath- Selling parts with known defects
42418: 02/04/23: Falk Brunner: Re: Xilinx Easypath- Selling parts with known defects
42354: 02/04/21: rickman: Re: Xilinx Easypath- Selling parts with known defects
42364: 02/04/22: Jens Hildebrandt: Re: Xilinx Easypath- Selling parts with known defects
42596: 02/04/28: Ray Andraka: Re: Xilinx Easypath- Selling parts with known defects
42599: 02/04/28: Jan Gray: Re: Xilinx Easypath- Selling parts with known defects
42600: 02/04/29: Bob Perlman: Re: Xilinx Easypath- Selling parts with known defects
42436: 02/04/24: Nicholas Weaver: Re: Xilinx Easypath- Selling parts with known defects
42294: 02/04/19: Antonis Karvelas: Multilinx: timing specs
42299: 02/04/19: Jim Raynor: XC9500XL problem
42325: 02/04/20: Falk Brunner: Re: XC9500XL problem
42347: 02/04/21: Lorenzo Lutti: Re: XC9500XL problem
42391: 02/04/22: Peter Alfke: Re: XC9500XL problem
42425: 02/04/23: Lorenzo Lutti: Re: XC9500XL problem
42527: 02/04/26: Ralf A. Eckhardt: Re: XC9500XL problem
42365: 02/04/22: Dziadek: Re: XC9500XL problem
42304: 02/04/19: Falk Brunner: A new experiment
42312: 02/04/20: Tim: Re: just bought Cohen's book...Real Chip Design and Verification using Verilog and VHDL
42316: 02/04/20: D2fabrizio: Announce: non_overlapping_clocks script for TimingAnalyzer
42322: 02/04/20: Russell: 4.2 Webpack error
42334: 02/04/20: Kevin Brace: Re: 4.2 Webpack error
42337: 02/04/21: russell: Re: 4.2 Webpack error
42343: 02/04/21: russell: Re: 4.2 Webpack error
42323: 02/04/20: liandongzhang: Some Questions about Pci configuration.
42355: 02/04/21: Kevin Brace: Re: Some Questions about Pci configuration.
42326: 02/04/20: Kumar: logic does not work at higher frequency
42327: 02/04/20: Phil Hays: Re: logic does not work at higher frequency
42410: 02/04/23: Kumar: Re: logic does not work at higher frequency
42331: 02/04/20: Demosa: FLEX10K ALU question.
42335: 02/04/20: Steve Casselman: Xilinx Parallel III cable and Solaris 8
42339: 02/04/21: H.L: clock management in Virtex-E (DLL)
42340: 02/04/21: H.L: I hope this figure is better
42342: 02/04/21: Russell: Re: I hope this figure is better
42346: 02/04/21: H.L: Re: I hope this figure is better
42341: 02/04/21: Falk Brunner: Re: clock management in Virtex-E (DLL)
42351: 02/04/21: H.L: Re: clock management in Virtex-E (DLL)
42371: 02/04/22: Falk Brunner: Re: clock management in Virtex-E (DLL)
42407: 02/04/23: H.L: Re: clock management in Virtex-E (DLL)
42344: 02/04/21: russell: Constraint editor error
42358: 02/04/21: russell: Re: Constraint editor error
42345: 02/04/21: Sean: Programming Spartan2 and external clock
42349: 02/04/21: Peter Alfke: Re: Programming Spartan2 and external clock
42350: 02/04/21: gianzi: Re: Programming Spartan2 and external clock
42348: 02/04/21: gianzi: VIRTEX & JTAG
42359: 02/04/22: Kevin Brace: Is the following Spartan-II FG456 package LogiCORE PCI pinout correct?
42362: 02/04/22: Russell: Re: Is the following Spartan-II FG456 package LogiCORE PCI pinout
42400: 02/04/22: Kevin Brace: Re: Is the following Spartan-II FG456 package LogiCORE PCI pinout
42360: 02/04/22: Kevin Brace: Wanted: Standard LogiCORE PCI pinout of various Xilinx FPGAs
42363: 02/04/21: Itsaso Zuazua: Post-synthesis simulation
42383: 02/04/22: Mike Treseler: Re: Post-synthesis simulation
42402: 02/04/23: ralph: Re: Post-synthesis simulation
42366: 02/04/22: Noddy: Signal saturation
42368: 02/04/22: point308: FoxFire II PCI Latency cards
42373: 02/04/22: Sasa Bremec: FPGA Express problems
42382: 02/04/22: Mike Treseler: Re: FPGA Express problems
42413: 02/04/23: Sasa Bremec: Re: FPGA Express problems
42387: 02/04/22: Wayne: use coregen rlocs or not ?
42388: 02/04/23: hiro: INIT constrain
42396: 02/04/22: Hari Devanath: Re: INIT constrain
42398: 02/04/22: Brian Philofsky: Re: INIT constrain
42467: 02/04/24: Jacky Renaux: Re: INIT constrain
42392: 02/04/22: Sean: Trouble assigning tri-stated output buffers in Spartan2 w/Foundation
42395: 02/04/22: Kevin Brace: Re: Trouble assigning tri-stated output buffers in Spartan2 w/Foundation
42393: 02/04/22: M Schreiber: Using LogiBlox in Virtex2
42399: 02/04/22: Michael: Prototyping Boards for Hobbyist CPU/System Designs
42404: 02/04/23: Thorsten Trenz: Re: Prototyping Boards for Hobbyist CPU/System Designs
42421: 02/04/23: Manfred Kraus: Re: Prototyping Boards for Hobbyist CPU/System Designs
42464: 02/04/24: Herbert Kleebauer: Re: Prototyping Boards for Hobbyist CPU/System Designs
42487: 02/04/25: Christopher Saunter: Re: Prototyping Boards for Hobbyist CPU/System Designs
42405: 02/04/23: Patrik Eriksson: DCM off chip deskew
42630: 02/04/29: Marc Randolph: Re: DCM off chip deskew
42742: 02/05/01: Peter Young: Re: DCM off chip deskew
42408: 02/04/23: Jock: Maximum Usage in a Virtex FPGA
42417: 02/04/23: Jay: Re: Maximum Usage in a Virtex FPGA
42430: 02/04/23: Rajeev Jayaraman: Re: Maximum Usage in a Virtex FPGA
42525: 02/04/26: David Hawke: Re: Maximum Usage in a Virtex FPGA
42567: 02/04/27: Hal Murray: Re: Maximum Usage in a Virtex FPGA
42409: 02/04/23: Buddy Smith: Altera error: non-locally static bounds are not supported
42411: 02/04/23: Kumar: Factor of 2 problem while using xilinx multiplier core
42414: 02/04/23: Georg Acher: Re: Factor of 2 problem while using xilinx multiplier core
42415: 02/04/23: russell: Floorplanning
42439: 02/04/24: Chris: Re: Floorplanning
42548: 02/04/27: Ray Andraka: Re: Floorplanning
42416: 02/04/23: Ryan Fong: Virtex 2: Partial Bitstream Generation
42451: 02/04/24: Austin Lesea: Re: Virtex 2: Partial Bitstream Generation
42929: 02/05/07: Martin: Re: Virtex 2: Partial Bitstream Generation
42419: 02/04/23: Theron Hicks: problem with coding a bidirectional bus simulation
42426: 02/04/23: Speedy Zero Two: Re: problem with coding a bidirectional bus simulation
42420: 02/04/23: Apeak: PAL and GAL
42422: 02/04/23: Felipe Joffre Romano Renon: Input Frequence
42503: 02/04/25: Jay: Re: Input Frequence
42504: 02/04/25: Felipe Joffre Romano Renon: Re: Input Frequence
42427: 02/04/23: Mike Hubert: Xilinx: IP Capture/CoreGenerator
42428: 02/04/23: Eric Crabill: Re: Xilinx: IP Capture/CoreGenerator
42429: 02/04/23: ZSpider: Reasonably Priced Development Software ??
42434: 02/04/23: Jeff Cunningham: Re: Reasonably Priced Development Software ??
42437: 02/04/23: jeff: Re: Reasonably Priced Development Software ??
42440: 02/04/24: Kevin Brace: Re: Reasonably Priced Development Software ??
42442: 02/04/24: James Srinivasan: Re: Reasonably Priced Development Software ??
42443: 02/04/24: Nial Stewart: Re: Reasonably Priced Development Software ??
42444: 02/04/24: James Srinivasan: Re: Reasonably Priced Development Software ??
42447: 02/04/24: ZSpider: Re: Reasonably Priced Development Software ??
42435: 02/04/24: Muzaffer Kal: sharing SDRAM between processor and VirtexII?
42438: 02/04/23: Eric Smith: Re: sharing SDRAM between processor and VirtexII?
42495: 02/04/25: rickman: Re: sharing SDRAM between processor and VirtexII?
42441: 02/04/24: Steffen Thieringer: ISE 4.2 Java Problem
42458: 02/04/24: Kamal Patel: Re: ISE 4.2 Java Problem
42445: 02/04/24: =?iso-8859-1?Q?Pawe=B3?= J. Rajda: SpartanII design considerations...
42471: 02/04/24: Kevin Brace: Re: SpartanII design considerations...
42472: 02/04/24: Austin Lesea: Re: SpartanII design considerations...
42493: 02/04/25: rickman: Re: SpartanII design considerations...
42496: 02/04/25: Falk Brunner: Re: SpartanII design considerations...
42499: 02/04/25: Austin Lesea: Re: SpartanII design considerations...
42518: 02/04/25: rickman: Re: SpartanII design considerations...
42531: 02/04/26: Austin Lesea: Re: SpartanII design considerations...
42538: 02/04/26: Falk Brunner: Re: SpartanII design considerations...
42560: 02/04/27: rickman: Re: SpartanII design considerations...
42549: 02/04/27: Ray Andraka: Re: SpartanII design considerations...
42561: 02/04/27: rickman: Re: SpartanII design considerations...
42565: 02/04/27: Hal Murray: Re: SpartanII design considerations...
42569: 02/04/27: rickman: Re: SpartanII design considerations...
42570: 02/04/28: Tim: Re: SpartanII design considerations...
42571: 02/04/28: Nicholas Weaver: Re: SpartanII design considerations...
42574: 02/04/28: Peter Alfke: Re: SpartanII design considerations...
42577: 02/04/28: Jim Granville: Re: SpartanII design considerations...
42584: 02/04/28: Tim: Re: SpartanII design considerations...
42587: 02/04/28: rickman: Re: SpartanII design considerations...
42572: 02/04/28: Peter Alfke: Re: SpartanII design considerations...
42573: 02/04/28: Jim Granville: Re: SpartanII design considerations...
42588: 02/04/28: emanuel stiebler: Re: SpartanII design considerations...
42576: 02/04/27: Kevin Brace: Re: SpartanII design considerations...
42579: 02/04/28: Peter Alfke: Re: SpartanII design considerations...
42603: 02/04/29: Kevin Brace: Re: SpartanII design considerations...
42632: 02/04/29: Peter Alfke: Re: SpartanII design considerations...
42636: 02/04/29: Peter Alfke: Tristate and Output Enable
42735: 02/05/01: Eric Crabill: Re: SpartanII design considerations...
42736: 02/05/01: Kevin Brace: Re: SpartanII design considerations...
42741: 02/05/01: Peter Alfke: Re: SpartanII design considerations...
42761: 02/05/02: <hamish@cloud.net.au>: Re: SpartanII design considerations...
42785: 02/05/02: Kevin Brace: Re: SpartanII design considerations...
42792: 02/05/02: Peter Alfke: Re: SpartanII design considerations...
42837: 02/05/04: <hamish@cloud.net.au>: Re: SpartanII design considerations...
42839: 02/05/04: Hal Murray: Re: SpartanII design considerations...
42593: 02/04/28: Ray Andraka: Re: SpartanII design considerations...
42594: 02/04/28: Peter Alfke: Re: SpartanII design considerations...
42691: 02/04/30: Peter Alfke: Virtex Evolution ( Deltas )
42760: 02/05/02: <news@rtrussell.co.uk>: Re: Virtex Evolution ( Deltas )
42482: 02/04/24: jakab tanko: Re: SpartanII design considerations...
42446: 02/04/24: Paul: Changing ROM contents
42528: 02/04/26: David Hawke: Re: Changing ROM contents
42545: 02/04/26: Jacky Renaux: Re: Changing ROM contents
42634: 02/04/29: Brian Philofsky: Re: Changing ROM contents
42448: 02/04/24: Russell: Spartan JTAG and pullups
42461: 02/04/24: Falk Brunner: Re: Spartan JTAG and pullups
42449: 02/04/24: ybc: Xilinx XC2S150 PQ208 slave parallel mode for flash download program error !!!
42526: 02/04/26: David Hawke: Re: Xilinx XC2S150 PQ208 slave parallel mode for flash download program
42452: 02/04/24: Jeremy D. Grotte: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42460: 02/04/24: Falk Brunner: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42473: 02/04/24: Jay: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42476: 02/04/25: Jim Granville: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42488: 02/04/25: Jeremy D. Grotte: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42507: 02/04/26: Jim Granville: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42534: 02/04/26: Jeremy D. Grotte: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42547: 02/04/26: Loi Tran: Re: Using PAL/GAL/FPGA to replace CPU's (correct news group?)
42453: 02/04/24: Zack Hugh: 256-point FFT with Xilinx 4.1 Core Generator
42454: 02/04/24: Noddy: Frequency synthesiser
42455: 02/04/24: Austin Lesea: Re: Frequency synthesiser
42486: 02/04/25: Noddy: Re: Frequency synthesiser
42492: 02/04/25: Austin Lesea: Re: Frequency synthesiser
42502: 02/04/25: Noddy: Re: Frequency synthesiser
42522: 02/04/26: Noddy: Re: Frequency synthesiser
42532: 02/04/26: Austin Lesea: Re: Frequency synthesiser
42652: 02/04/30: Manfred Kraus: Re: Frequency synthesiser
42787: 02/05/02: Noddy: Re: Frequency synthesiser
42795: 02/05/03: Jim Granville: Re: Frequency synthesiser
42823: 02/05/03: Manfred Kraus: Re: Frequency synthesiser
42826: 02/05/03: Peter Alfke: Re: Frequency synthesiser
42845: 02/05/04: Falk Brunner: Re: Frequency synthesiser
42864: 02/05/05: Noddy: Re: Frequency synthesiser
42865: 02/05/05: Falk Brunner: Re: Frequency synthesiser
42867: 02/05/05: Noddy: Re: Frequency synthesiser
42868: 02/05/06: Jim Granville: Re: Frequency synthesiser
42880: 02/05/06: Noddy: Re: Frequency synthesiser
42888: 02/05/06: Brian Drummond: Re: Frequency synthesiser
42897: 02/05/06: Falk Brunner: Re: Frequency synthesiser
42921: 02/05/07: Martin E.: Re: Frequency synthesiser
42854: 02/05/05: Russell: Re: Frequency synthesiser
42875: 02/05/06: rickman: Re: Frequency synthesiser
43160: 02/05/15: Hal Murray: Re: Frequency synthesiser
43161: 02/05/15: Jim Granville: Re: Frequency synthesiser
43243: 02/05/17: Hal Murray: Re: Frequency synthesiser
43255: 02/05/17: John_H: Re: Frequency synthesiser
43169: 02/05/15: John_H: Re: Frequency synthesiser
43216: 02/05/16: John_H: Re: Frequency synthesiser
43573: 02/05/24: Ray Andraka: Re: Frequency synthesiser
43590: 02/05/24: Marty: Re: Frequency synthesiser
43634: 02/05/28: Ray Andraka: Re: Frequency synthesiser
43642: 02/05/28: John_H: Re: Frequency synthesiser
43643: 02/05/28: Austin Lesea: Re: Frequency synthesiser
43646: 02/05/28: John_H: Re: Frequency synthesiser
43647: 02/05/28: Austin Lesea: Re: Frequency synthesiser
43662: 02/05/29: Allan Herriman: Re: Frequency synthesiser
43665: 02/05/28: John_H: Re: Frequency synthesiser
43676: 02/05/29: John_H: Re: Frequency synthesiser
43723: 02/05/31: John_H: Re: Frequency synthesiser
43650: 02/05/28: Falk Brunner: Re: Frequency synthesiser
43651: 02/05/28: Austin Lesea: Re: Frequency synthesiser
43653: 02/05/29: Jim Granville: Re: Frequency synthesiser
43654: 02/05/28: Austin Lesea: Re: Frequency synthesiser
43659: 02/05/28: John_H: Re: Frequency synthesiser
43655: 02/05/28: John_H: Re: Frequency synthesiser
43658: 02/05/28: Austin Lesea: Re: Frequency synthesiser
43661: 02/05/29: Jim Granville: Re: Frequency synthesiser
43673: 02/05/29: Luis Cupido: Re: Frequency synthesiser
43678: 02/05/29: Austin Lesea: Re: Frequency synthesiser
43704: 02/05/30: Brian Davis: Re: Frequency synthesiser
43705: 02/05/30: Austin Lesea: Re: Frequency synthesiser
43706: 02/05/30: John_H: Re: Frequency synthesiser
43708: 02/05/30: Falk Brunner: Re: Frequency synthesiser
43720: 02/05/30: Brian Davis: Re: Frequency synthesiser
43709: 02/05/30: Falk Brunner: Re: Frequency synthesiser
43652: 02/05/28: John_H: Re: Frequency synthesiser
43689: 02/05/29: Falk Brunner: Re: Frequency synthesiser
43693: 02/05/29: John_H: Re: Frequency synthesiser
42456: 02/04/24: FK: Variable freq
42459: 02/04/24: Falk Brunner: Re: Variable freq
42462: 02/04/24: Stefano M: Newbie with signals
42468: 02/04/24: Keith R. Williams: Re: Newbie with signals
42497: 02/04/25: Falk Brunner: Re: Newbie with signals
42519: 02/04/26: Stefano M: Re: Newbie with signals
42523: 02/04/26: Tim: Re: Newbie with signals
42540: 02/04/26: Keith R. Williams: Re: Newbie with signals
42498: 02/04/25: Bryan: Re: Newbie with signals
42463: 02/04/24: Stephen Henry: Newbie Advice Please
42501: 02/04/25: Nicholas Weaver: Re: Newbie Advice Please
42552: 02/04/26: Jan Gray: Re: Newbie Advice Please
42465: 02/04/24: =?iso-8859-1?Q?St=E9phane?= Guyetant: virtex package
42470: 02/04/24: Kevin Brace: Re: virtex package
42466: 02/04/24: H.L: Virtex DLL (part 10393)
42469: 02/04/24: Lasse Langwadt Christensen: configuration mystery
42508: 02/04/25: Lasse Langwadt Christensen: Re: configuration mystery, solved
42510: 02/04/25: Jay: Re: configuration mystery
42477: 02/04/24: Sean A Laughter: Using 74HCT245N between Spartan-II and ISA
42478: 02/04/25: John_H: Re: Using 74HCT245N between Spartan-II and ISA
42479: 02/04/25: Tim: Re: Using 74HCT245N between Spartan-II and ISA
42480: 02/04/24: Eric Smith: Re: Using 74HCT245N between Spartan-II and ISA
42483: 02/04/24: Sean: Re: Using 74HCT245N between Spartan-II and ISA
42489: 02/04/25: Austin Lesea: Re: Using 74HCT245N between Spartan-II and ISA
42490: 02/04/25: rickman: Re: Using 74HCT245N between Spartan-II and ISA
42494: 02/04/25: Magnus Homann: Re: Using 74HCT245N between Spartan-II and ISA
42505: 02/04/25: Sean: Re: Using 74HCT245N between Spartan-II and ISA
42509: 02/04/25: Kevin Brace: Re: Using 74HCT245N between Spartan-II and ISA
42512: 02/04/25: rickman: Re: Using 74HCT245N between Spartan-II and ISA
42553: 02/04/27: Ray Andraka: Re: Using 74HCT245N between Spartan-II and ISA
42554: 02/04/27: Ray Andraka: Re: Using 74HCT245N between Spartan-II and ISA
42481: 02/04/24: Kaj Hedin: counter application
42484: 02/04/25: Sasa Bremec: SpartanXL libraries (OSC4 element)
42491: 02/04/25: Chris Dunlap: Re: SpartanXL libraries (OSC4 element)
42485: 02/04/25: Michback: Hack an bitstream file for AT40Kxx
42520: 02/04/26: Ulf Samuelsson: Re: Hack an bitstream file for AT40Kxx
42521: 02/04/26: Russell: Re: Hack an bitstream file for AT40Kxx
42556: 02/04/27: Eric Smith: Re: Hack an bitstream file for AT40Kxx
42607: 02/04/29: Michael Kleinkes: Re: Hack an bitstream file for AT40Kxx
42610: 02/04/29: Ulf Samuelsson: Re: Hack an bitstream file for AT40Kxx
42690: 02/05/01: John Williams: Re: Hack an bitstream file for AT40Kxx
42500: 02/04/25: Steven Derrien: FPGA vs Multi-processors
42506: 02/04/25: Sean: Problems creating a tristated data bus on Spartan-II
42669: 02/04/30: Pete Koziar: Re: Problems creating a tristated data bus on Spartan-II
42511: 02/04/25: John Schewel: CPF - Late Breaking Papers for RTC 2002
42515: 02/04/25: SECRET: Does Vertex II PRO Really work?
42529: 02/04/26: Austin Lesea: Re: Does Virtex II PRO Really work? You damn betcha!
42558: 02/04/27: Brian Drummond: Re: Does Vertex II PRO Really work?
42606: 02/04/29: Kevin Brace: Re: Does Vertex II PRO Really work?
42618: 02/04/29: roy: Re: Does Vertex II PRO Really work?
42611: 02/04/29: Phil Connor: Re: Does Vertex II PRO Really work?
42623: 02/04/29: Peter Alfke: Re: Does Vertex II PRO Really work?
42650: 02/04/30: Phil Connor: Re: Does Vertex II PRO Really work?
42637: 02/04/29: Davis Moore: Re: Does Vertex II PRO Really work?
42638: 02/04/30: Nicholas Weaver: Re: Does Vertex II PRO Really work?
42639: 02/04/29: Peter Alfke: Re: Does Vertex II PRO Really work?
42524: 02/04/26: Tim: Hot stuff from John Cooley's newsletter
42530: 02/04/26: Laurent Gauch: webpack : how to generate a .sdf and .vhd for simulation
42537: 02/04/26: Falk Brunner: Re: webpack : how to generate a .sdf and .vhd for simulation
42543: 02/04/26: Kevin Brace: Re: webpack : how to generate a .sdf and .vhd for simulation
42535: 02/04/26: Ajit Oke: Spartan II configuration
42536: 02/04/26: Falk Brunner: Re: Spartan II configuration
42539: 02/04/26: Steve Casselman: Re: Spartan II configuration
42807: 02/05/03: Jon Schneider: Re: Spartan II configuration
42541: 02/04/26: Jon: 4005XL and 4010XL compatibility
42544: 02/04/26: Peter Alfke: Re: 4005XL and 4010XL compatibility
42627: 02/04/29: Jon: Re: 4005XL and 4010XL compatibility
42628: 02/04/29: Peter Alfke: Re: 4005XL and 4010XL compatibility
42551: 02/04/26: Benjamin Heart: ABEL for the Altera MAX 7000
42555: 02/04/27: Kelly Hall: Re: ABEL for the Altera MAX 7000
42620: 02/04/29: roy: Re: ABEL for the Altera MAX 7000
42631: 02/04/29: James Horn: Re: ABEL for the Altera MAX 7000
42557: 02/04/27: bharathbhushan: function usage
42622: 02/04/29: Mike Treseler: Re: function usage
42559: 02/04/27: ssy: synplicity 6.2.4 can not recongnize "altera_implement_in_esb" directive
42564: 02/04/27: Ken McElvain: Re: synplicity 6.2.4 can not recongnize "altera_implement_in_esb" directive
42562: 02/04/27: rickman: Availability of XC2S150E-6FG456I
42621: 02/04/29: roy: Re: Availability of XC2S150E-6FG456I
42712: 02/05/01: rickman: Re: Availability of XC2S150E-6FG456I
42717: 02/05/01: Magnus Homann: Re: Availability of XC2S150E-6FG456I
42828: 02/05/03: Jeff Wallace: Re: Availability of XC2S150E-6FG456I
42726: 02/05/01: Peter Alfke: Re: Availability of XC2S150E-6FG456I
42730: 02/05/01: rickman: Re: Availability of XC2S150E-6FG456I
42737: 02/05/01: Peter Alfke: Re: Availability of XC2S150E-6FG456I
42747: 02/05/01: rickman: Re: Availability of XC2S150E-6FG456I
42748: 02/05/02: Peter Alfke: Re: Availability of XC2S150E-6FG456I
42782: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42805: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42759: 02/05/02: russell: Re: Availability of XC2S150E-6FG456I
42772: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42773: 02/05/02: Falk Brunner: Re: Availability of XC2S150E-6FG456I
42780: 02/05/02: Peter Alfke: Re: Availability of XC2S150E-6FG456I
42808: 02/05/03: Hal Murray: Re: Availability of XC2S150E-6FG456I
42781: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42821: 02/05/03: Falk Brunner: Re: Availability of XC2S150E-6FG456I
42771: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42809: 02/05/03: Hal Murray: Re: Availability of XC2S150E-6FG456I
42817: 02/05/03: rickman: Re: Availability of XC2S150E-6FG456I
42920: 02/05/07: Martin Thompson: Re: Availability of XC2S150E-6FG456I
42923: 02/05/07: rickman: Re: Availability of XC2S150E-6FG456I
42778: 02/05/02: emanuel stiebler: Re: Availability of XC2S150E-6FG456I
42783: 02/05/02: rickman: Re: Availability of XC2S150E-6FG456I
42563: 02/04/27: Jon Schneider: Spartan II OBUF drive strengths
42568: 02/04/27: Hristo Stevic: Controller Initial State
42592: 02/04/28: Hristo Stevic: Re: Controller Initial State
42624: 02/04/29: Mike Treseler: Re: Controller Initial State
42575: 02/04/28: Stephen Williams: Suspicious code in Verilog model for Xilinx DCM module
42578: 02/04/28: crackeur: static logic vs LUT
42580: 02/04/28: Peter Alfke: Re: static logic vs LUT
42744: 02/05/02: news.bellatlantic.net: Re: static logic vs LUT
42770: 02/05/02: Brian Philofsky: Re: static logic vs LUT
42879: 02/05/06: Stephen Williams: Re: static logic vs LUT
42581: 02/04/28: Nurit Eliram: fpga unpackaged dies
42585: 02/04/28: gianzi: How can I test a downloaded design?
42586: 02/04/28: Leon Qin: Where can I get basic knowledge for LFSR and Module-2 theory
42589: 02/04/28: Maciek: Xilinx
42590: 02/04/28: Peter Alfke: Re: Xilinx
42591: 02/04/28: Nicholas Weaver: Re: Xilinx
42595: 02/04/28: S. Ramirez: FlexLM
42598: 02/04/29: Nicholas Weaver: Re: FlexLM
42601: 02/04/29: Spam Hater: Re: FlexLM
42602: 02/04/29: Leo Havm?ller: Re: FlexLM
42616: 02/04/29: Arash Salarian: Re: FlexLM
42604: 02/04/29: Anthony Ellis: Xilinx-Synplicity-License issue?
43064: 02/05/11: Ken McElvain: Re: Xilinx-Synplicity-License issue?
42605: 02/04/29: Frank Zampa: High current I/O on SpartanXL
42629: 02/04/29: Falk Brunner: Re: High current I/O on SpartanXL
42608: 02/04/29: Stein Kj?lstad: Partial reconfiguration
42626: 02/04/29: Nicholas Weaver: Re: Partial reconfiguration
42609: 02/04/29: Paul Hohle: SMI (Software Model Interface)
42613: 02/04/29: Matjaz Finc: Altera Nios - ptf documentation
42687: 02/04/30: Alan Calac: Re: Altera Nios - ptf documentation
42696: 02/04/30: Bill Moyer: Re: Altera Nios - ptf documentation
42614: 02/04/29: Matjaz Finc: Altera Nios - master/slave peripheral
42692: 02/04/30: Alan Calac: Re: Altera Nios - master/slave peripheral
42697: 02/04/30: Bill Moyer: Re: Altera Nios - master/slave peripheral
42615: 02/04/29: =?iso-8859-1?Q?St=E9phane?= Guyetant: easy upgrade?
42617: 02/04/29: Michael Kleinkes: MGL Editor for AT40K
42619: 02/04/29: spyng: un-constraint path - from Clock pad to FFS clock pin
42625: 02/04/29: Bob Perlman: Re: un-constraint path - from Clock pad to FFS clock pin
42654: 02/04/30: spyng: Re: un-constraint path - from Clock pad to FFS clock pin
42633: 02/04/29: Barry Brown: Power-up reset of Xilinx Spartan-II
42662: 02/04/30: Dave Matthews: Re: Power-up reset of Xilinx Spartan-II
42668: 02/04/30: Austin Lesea: Re: Power-up reset of Xilinx Spartan-II
42635: 02/04/29: Prashant: Loading values in Quartus II Waveform editor
42641: 02/04/29: Kevin Brace: Re: Loading values in Quartus II Waveform editor
42645: 02/04/30: Paul Baxter: Re: Loading values in Quartus II Waveform editor
42657: 02/04/30: Prashant: Re: Loading values in Quartus II Waveform editor
42640: 02/04/29: Mark Ng: Re: Xilinx XC9500XL family - disabling the bus-hold circuits
42651: 02/04/30: Len Chisholm: Re: Xilinx XC9500XL family - disabling the bus-hold circuits
42642: 02/04/30: Sean A Laughter: SpartanII ISA interface, IDE and ISA contention??
42647: 02/04/30: Jens Hildebrandt: Re: SpartanII ISA interface, IDE and ISA contention??
42643: 02/04/30: Kelvin XCJ: Query on Power Compiler.
42649: 02/04/30: Deville: power supply sequencer for Virtex II
42658: 02/04/30: Austin Lesea: Re: power supply sequencer for Virtex II
42674: 02/05/01: Jim Granville: Re: power supply sequencer for Virtex II
42679: 02/04/30: Austin Lesea: Re: power supply sequencer for Virtex II
42681: 02/05/01: Jim Granville: Re: power supply sequencer for Virtex II
42686: 02/04/30: Austin Lesea: Re: power supply sequencer for Virtex II
43038: 02/05/10: Hal Murray: Re: power supply sequencer for Virtex II
43043: 02/05/10: Falk Brunner: Re: power supply sequencer for Virtex II
43050: 02/05/10: Austin Lesea: Re: power supply sequencer for Virtex II
42653: 02/04/30: Laurent Gauch: EDIF parser (perl)
42695: 02/05/01: Tim: Re: EDIF parser (perl)
42836: 02/05/04: Allan Herriman: Re: EDIF parser (perl)
42655: 02/04/30: Vincent JADOT: Pb to write on flash with nios on excalibur
42659: 02/04/30: Theron Hicks: clock buffer infered on master reset in ISE for spartan2E
42660: 02/04/30: Falk Brunner: Re: clock buffer infered on master reset in ISE for spartan2E
42661: 02/04/30: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42667: 02/04/30: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42670: 02/04/30: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42678: 02/04/30: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42685: 02/04/30: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42713: 02/05/01: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42721: 02/05/01: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42728: 02/05/01: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42731: 02/05/01: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42740: 02/05/01: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42763: 02/05/02: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42789: 02/05/02: Bob Perlman: Re: simultaneous switching of LVPECL outputs
42790: 02/05/02: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42791: 02/05/02: Peter Alfke: Re: simultaneous switching of LVPECL outputs
42794: 02/05/03: Jim Granville: Re: simultaneous switching of LVPECL outputs
42796: 02/05/02: Austin Lesea: Re: simultaneous switching of LVPECL outputs
42797: 02/05/03: Jim Granville: Re: simultaneous switching of LVPECL outputs
42818: 02/05/03: Austin Lesea: Re: simultaneous switching of LVPECL outputs
43069: 02/05/12: Rick Filipkiewicz: Re: simultaneous switching of LVPECL outputs
42663: 02/04/30: rickman: SpartanIIE hold timing
42664: 02/04/30: Eric Crabill: Re: SpartanIIE hold timing
42666: 02/04/30: Peter Alfke: Re: SpartanIIE hold timing
42671: 02/04/30: rickman: Re: SpartanIIE hold timing
42673: 02/04/30: Nicholas Weaver: Re: SpartanIIE hold timing
42677: 02/04/30: rickman: Re: SpartanIIE hold timing
42711: 02/05/01: David Frith: Re: SpartanIIE hold timing
42716: 02/05/01: rickman: Re: SpartanIIE hold timing
42751: 02/05/02: Hal Murray: Delivery problems..
42764: 02/05/02: Austin Lesea: Re: Delivery problems..
42784: 02/05/02: rickman: Re: Delivery problems..
42676: 02/04/30: Wayne: Xilinx fpgas for sale

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