30840: 01/05/01: Anthony Ellis: Renoir -> HDL designer?
30843: 01/05/01: Nisreen Taiyeby: Exemplar: If-elsif synthesises to Muxcy in virtexE
30916: 01/05/03: bhupesh_rrediffmail.com: Re: Exemplar: If-elsif synthesises to Muxcy in virtexE
30844: 01/05/01: David Nyarko: Xilinx Virtex-II multiplier reuse examples
30846: 01/05/01: M.B.: ccd imaging with fpga
30851: 01/05/01: Erik Widding: Re: ccd imaging with fpga
30860: 01/05/01: Jonas Thor: Re: ccd imaging with fpga
30871: 01/05/02: Kolja Sulimma: Re: ccd imaging with fpga
30975: 01/05/07: Jonas Thor: Re: ccd imaging with fpga
30876: 01/05/02: Victor Schutte: Re: ccd imaging with fpga
30880: 01/05/02: Michael Strothjohann: Re: ccd imaging with fpga
30909: 01/05/03: Austin Franklin: Re: ccd imaging with fpga
30918: 01/05/03: M.B.: Re: ccd imaging with fpga
30922: 01/05/03: Erik Widding: Re: ccd imaging with fpga
30936: 01/05/04: Allan Herriman: Re: ccd imaging with fpga
30950: 01/05/04: Erik Widding: Re: ccd imaging with fpga
30849: 01/05/01: Steven Derrien: Using synospys power compiler for Xilinx Virtex design ..
30856: 01/05/01: Segis: Translator from XcheckerƒGs files to PROMƒGs files.
30941: 01/05/04: Mike Johnson: Re: Translator from XcheckerƒGs files to PROMƒGs files.
30862: 01/05/01: <gr6@ukc.ac.uk>: USB CORE IN VHDL
30878: 01/05/02: Nicolas Matringe: Re: USB CORE IN VHDL
30868: 01/05/02: Mark Walter: Serial UART
30897: 01/05/02: Kevin Neilson: Re: Serial UART
30898: 01/05/02: Kolja Sulimma: Re: Serial UART
30905: 01/05/02: Peter Alfke: Re: Serial UART
30910: 01/05/03: Mark Walter: Re: Serial UART
30924: 01/05/03: Kevin Neilson: Re: Serial UART
30925: 01/05/03: Mike Treseler: Re: Serial UART
30955: 01/05/04: VhdlCohen: Re: Serial UART
30926: 01/05/03: Jim Poder: Re: Serial UART
30927: 01/05/03: Kolja Sulimma: Re: Serial UART
30939: 01/05/04: Klaus-Guenter Leiss: Re: Serial UART
30960: 01/05/04: Peter: Re: Serial UART
31165: 01/05/14: Miha Dolenc: Re: Serial UART
30872: 01/05/02: Markus Meng: [Q] PC104 Slave Board Minimum Signal Requirements ...
30877: 01/05/02: Noddy: Newbie
30899: 01/05/02: Tim Jaynes: Re: Newbie
30879: 01/05/02: <oliver.amft@ch.abb.com.nospam>: FPGA SPROM boot problem
30881: 01/05/02: rebai chiheb: failed to configure virtex
30884: 01/05/02: Oliver Amft: Re: failed to configure virtex
30887: 01/05/02: Tom Fischaber: Re: failed to configure virtex
30885: 01/05/02: Christof Paar: Final Program CHES 2001
30891: 01/05/02: Rotem Gazit: Looking for a prototyping board
31004: 01/05/09: Rich McNeil: Re: Looking for a prototyping board
30907: 01/05/02: Anonymous Idiot: FPGA application survey question
30913: 01/05/03: Kolja Sulimma: Re: FPGA application survey question
30937: 01/05/03: Anonymous Idiot: Re: FPGA application survey question
30940: 01/05/04: Kolja Sulimma: Re: FPGA application survey question
30911: 01/05/03: James Brennan: FPGA based PCI cards
30914: 01/05/03: Marc Faure: Re: FPGA based PCI cards
30915: 01/05/03: Bhupesh: Re: FPGA based PCI cards
30938: 01/05/03: Anonymous Idiot: Re: FPGA based PCI cards
30966: 01/05/05: captset.vrn.ru: Re: FPGA based PCI cards
30923: 01/05/03: Miha Dolenc: PCI bridge core
30993: 01/05/08: Dave Feustel: Re: PCI bridge core
30928: 01/05/03: Compilit: EEjobs@yahoogroups.com
30935: 01/05/03: Roger.chen: BUFG output is constant0 at 200MHz in post timing
30952: 01/05/04: Brian Philofsky: Re: BUFG output is constant0 at 200MHz in post timing
31010: 01/05/09: Nicolas Matringe: Re: BUFG output is constant0 at 200MHz in post timing
30942: 01/05/04: Steven Sanders: CompactPCI card with Virtex
30945: 01/05/04: Bill Blyth: Re: CompactPCI card with Virtex
30965: 01/05/05: Vladimir Kapitanov: Re: CompactPCI card with Virtex
30943: 01/05/04: Noddy: Configuration Problems: Newbie
30944: 01/05/04: Olivier MALLINGER: Use of record type in a hierarchical architecture
30948: 01/05/04: Markus Michel: Re: Use of record type in a hierarchical architecture
30951: 01/05/04: Tom Verbeure: Re: Use of record type in a hierarchical architecture
30954: 01/05/04: Jonathan Bromley: Re: Use of record type in a hierarchical architecture
30956: 01/05/04: tiderh: timing simulation on Modelsim
30990: 01/05/08: Alan Fitch: Re: timing simulation on Modelsim
30958: 01/05/04: Keith R. Williams: Xilinx Constraints Editor ?
30999: 01/05/08: Kevin Smith: Re: Xilinx Constraints Editor ?
31021: 01/05/09: Keith R. Williams: Re: Xilinx Constraints Editor ?
31043: 01/05/09: John_H: Re: Xilinx Constraints Editor ?
30961: 01/05/04: vikram m n rao: Reading FPGA output on Parallel Port
30963: 01/05/04: Tom Burgess: Re: Reading FPGA output on Parallel Port
30962: 01/05/04: Su We: Good VHDL/synthesis book
30964: 01/05/04: Compilit: Re: Good VHDL/synthesis book
31030: 01/05/09: Jakab Tanko: Re: Good VHDL/synthesis book
31048: 01/05/10: cyber_spook: Re: Good VHDL/synthesis book
30967: 01/05/05: A1A Computer Professionals: Unlimited Jobs for Electronic Engineering jobs incl: ASIC,DSP,VHDL,FPGA,RF etc..
30969: 01/05/05: Pat: Altera Consultant
31050: 01/05/10: Gary Cook: Re: Altera Consultant
30976: 01/05/07: Christian Illinger: Licensing PB in Synplify_pro 6.2
30978: 01/05/07: Erik Widding: Re: Licensing PB in Synplify_pro 6.2
30984: 01/05/08: Muzaffer Kal: Re: Licensing PB in Synplify_pro 6.2
30986: 01/05/08: Markus Sponsel: Re: Licensing PB in Synplify_pro 6.2
31023: 01/05/09: Tom Fischaber: Re: Licensing PB in Synplify_pro 6.2
31024: 01/05/09: Mike Treseler: Re: Licensing PB in Synplify_pro 6.2
30979: 01/05/07: Pedro Diniz: Xilinx Virtex Libraries for Synopsys Behav. Compil
30983: 01/05/07: Alan Nishioka: Xilinx compressed .bit file format
30985: 01/05/08: Tomasz Brychcy: analog and digital?
30988: 01/05/08: Dziadek: Re: analog and digital?
31017: 01/05/09: Beau Schwabe: Re: analog and digital?
30989: 01/05/08: Roger.chen: Routing: Completed - errors found.
30994: 01/05/08: Rick Filipkiewicz: Re: Routing: Completed - errors found.
30997: 01/05/08: Scott Campbell: Re: Routing: Completed - errors found.
30998: 01/05/08: Kevin Smith: Re: Routing: Completed - errors found.
30992: 01/05/08: Alan Glynne Jones: xplaopt.exe - Application error
31297: 01/05/17: Dennis McCrohan: Re: xplaopt.exe - Application error
30995: 01/05/08: Venkatesh Akella: SYnopsys Library Compiler and LUT synthesis
30996: 01/05/08: Srinivasan Venkataramanan: Re: SYnopsys Library Compiler and LUT synthesis
31018: 01/05/09: Brian Philofsky: Re: SYnopsys Library Compiler and LUT synthesis
31009: 01/05/09: Koenraad Schelfhout: Re: SYnopsys Library Compiler and LUT synthesis
31000: 01/05/09: Segis: Translator from XcheckerƒGs files to PROMƒGs files.
31001: 01/05/09: Rick Filipkiewicz: Virtex-2 - experiences ?
31014: 01/05/09: Kolja Sulimma: Re: Virtex-2 - experiences ?
31015: 01/05/09: Erik Widding: Re: Virtex-2 - experiences ?
31086: 01/05/11: Meelis Kuris: Re: Virtex-2 - experiences ?
31125: 01/05/12: Erik Widding: Re: Virtex-2 - experiences ?
31163: 01/05/13: Austin Lesea: Re: Virtex-2 - experiences ?
31019: 01/05/09: Austin Lesea: Re: Virtex-2 - experiences ?
31027: 01/05/09: Tim: Re: Virtex-2 - experiences ?
31033: 01/05/09: Austin Lesea: Re: Virtex-2 - experiences ?
31038: 01/05/10: Tim: Re: Virtex-2 - experiences ?
31044: 01/05/09: Austin Lesea: Re: Virtex-2 - experiences ?
31039: 01/05/10: Rick Filipkiewicz: Re: Virtex-2 - experiences ?
31046: 01/05/09: Austin Lesea: Re: Virtex-2 - experiences ?
31036: 01/05/09: Rick Filipkiewicz: Re: Virtex-2 - experiences ?
31037: 01/05/09: Vikram Pasham: Re: Virtex-2 - experiences ?
31047: 01/05/09: Austin Lesea: Re: Virtex-2 - experiences ?
31213: 01/05/15: <hamish@cloud.net.au>: Re: Virtex-2 - experiences ?
31226: 01/05/15: Rick Filipkiewicz: Re: Virtex-2 - experiences ?
31002: 01/05/09: William F. Gilreath: Looking for information on Move-based architectures
31003: 01/05/09: Tony Proudfoot: Altera 20K200EFC484 and ChannelLink DS90CR483
31005: 01/05/09: Kris Nichols: Need Advice on what Xilinx Tools to purchase
31016: 01/05/09: Dylan Buli: Re: Need Advice on what Xilinx Tools to purchase
31081: 01/05/11: Ray Andraka: Re: Need Advice on what Xilinx Tools to purchase
31006: 01/05/08: Roger.chen: About CORE Generator RPM option
31007: 01/05/08: Roger.chen: About CORE Generator RPM option
31008: 01/05/09: Tomasz Brychcy: floorplaning and layout
31012: 01/05/09: Utku Ozcan: Re: floorplaning and layout
31013: 01/05/09: Philip Freidin: Re: floorplaning and layout
31020: 01/05/09: Nemo: Shannon Capacity - An Apology
31022: 01/05/09: Kevin Neilson: Re: Shannon Capacity - An Apology
31025: 01/05/09: Nemo: Re: Shannon Capacity - An Apology
31026: 01/05/09: Austin Lesea: Re: Shannon Capacity - An Apology
31045: 01/05/10: Bob Perlman: Re: Shannon Capacity - An Apology
31031: 01/05/09: Davis Moore: Re: Shannon Capacity - An Apology
31034: 01/05/09: Austin Lesea: Re: Shannon Capacity - An Apology
31057: 01/05/10: Nemo: Re: Shannon Capacity - An Apology
31055: 01/05/10: Nemo: Re: Shannon Capacity - An Apology
31058: 01/05/10: Brian Drummond: Re: Shannon Capacity - An Apology
31063: 01/05/10: Austin Lesea: Shannon Capacity, a quote from the paper
31089: 01/05/11: Brian Drummond: Re: Shannon Capacity, a quote from the paper
31127: 01/05/12: Rick Collins: Re: Shannon Capacity, a quote from the paper
31069: 01/05/10: Bertram Geiger: Re: Shannon Capacity - An Apology
31070: 01/05/10: Nemo: Re: Shannon Capacity - An Apology
31028: 01/05/09: Uwe Bonnes: Synplicity/Quicklogic choosing high drive input
31029: 01/05/09: Alan Nishioka: Re: Synplicity/Quicklogic choosing high drive input
31040: 01/05/09: Ken McElvain: Re: Synplicity/Quicklogic choosing high drive input
31041: 01/05/09: Ken McElvain: Re: Synplicity/Quicklogic choosing high drive input
31051: 01/05/10: Uwe Bonnes: Re: Synplicity/Quicklogic choosing high drive input
31077: 01/05/10: Ken McElvain: Re: Synplicity/Quicklogic choosing high drive input
31032: 01/05/09: Stan Ramsden: Xilinx : 1553 interface
31035: 01/05/09: Dave Feustel: Nallatech Products
31042: 01/05/10: <ewcce@aol.com>: Important news
31052: 01/05/10: Alan Glynne Jones: 32 bit limit on integers
31053: 01/05/10: Allan Herriman: Re: 32 bit limit on integers
31064: 01/05/10: Hagen Ploog: Re: 32 bit limit on integers
31054: 01/05/10: Marek Ponca: Waveforms painting
31059: 01/05/10: Utku Ozcan: Re: Waveforms painting
31060: 01/05/10: Marek Ponca: Re: Waveforms painting
31075: 01/05/11: Kent Orthner: Re: Waveforms painting
31061: 01/05/10: Joerg Ritter: Re: Waveforms painting
31082: 01/05/11: Marek Ponca: Re: Waveforms painting
31090: 01/05/11: Rick Filipkiewicz: Re: Waveforms painting
31174: 01/05/14: Joerg Ritter: Re: Waveforms painting
31080: 01/05/11: Srinivasan Venkataramanan: Re: Waveforms painting
31062: 01/05/10: Darrell Gibson: Leonardo/Modelsim/Xilinx post synthesis simulation (VHDL)
31177: 01/05/14: Alan Fitch: Re: Leonardo/Modelsim/Xilinx post synthesis simulation (VHDL)
31065: 01/05/10: <muzaffer@dspia.com>: Re: Spartan Annoyances
31066: 01/05/10: Eric Smith: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31067: 01/05/10: Kolja Sulimma: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31102: 01/05/11: martin capitanio: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31106: 01/05/11: Eric Smith: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31115: 01/05/12: Kolja Sulimma: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31136: 01/05/12: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31116: 01/05/12: Kolja Sulimma: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31119: 01/05/12: martin capitanio: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31139: 01/05/12: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31143: 01/05/13: <hamish@cloud.net.au>: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31068: 01/05/10: Rick Filipkiewicz: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31074: 01/05/10: Eric Smith: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31129: 01/05/12: Duane Clark: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31084: 01/05/11: Kolja Sulimma: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31104: 01/05/11: Rick Collins: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31085: 01/05/11: Wolfgang Loewer: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31121: 01/05/12: Phil Hays: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31122: 01/05/12: Kolja Sulimma: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31130: 01/05/12: Phil Hays: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31124: 01/05/12: Rick Collins: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31132: 01/05/12: Phil Hays: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31141: 01/05/12: Rick Collins: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31150: 01/05/13: Rick Filipkiewicz: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31152: 01/05/13: Dave Feustel: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31137: 01/05/12: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31140: 01/05/12: Eric Smith: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31155: 01/05/13: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31229: 01/05/16: glen herrmannsfeldt: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31264: 01/05/16: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31348: 01/05/20: Rick Collins: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31349: 01/05/20: Ben Franchuk: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31350: 01/05/20: Ben Franchuk: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31354: 01/05/20: Ben Franchuk: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31357: 01/05/20: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31353: 01/05/20: Neil Franklin: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31142: 01/05/13: Phil Hays: Re: Finally, an FPGA tool chain for Linux (Altera Quartus II)
31384: 01/05/21: Duane Clark: Re: Finally, an FPGA tool chain for Linux (Also Synplicity)
31071: 01/05/10: vikram m n rao: Reading Data on Parallel Port
31072: 01/05/10: <u687591552@spawnkill.ip-mobilphone.net>: fpga tutorials
31073: 01/05/11: Rick Filipkiewicz: Synplicity online support problem
31076: 01/05/10: John Larkin: Spartan Annoyances
31078: 01/05/10: Philip Freidin: Re: Spartan Annoyances
31091: 01/05/11: Alex Sherstuk: Re: Spartan Annoyances
31103: 01/05/11: Eric: Re: Spartan Annoyances
31158: 01/05/13: John Larkin: Re: Spartan Annoyances
31079: 01/05/11: Ben: [Q]CardBus PC Card with PCI device
31096: 01/05/11: Markus Meng: Re: [Q]CardBus PC Card with PCI device
31114: 01/05/12: "Paul E. Bennett": Re: [Q]CardBus PC Card with PCI device
31171: 01/05/14: Geir Frode Raanes: Re: [Q]CardBus PC Card with PCI device
31083: 01/05/11: Thomas Zipper: Asynchronous Compare
31087: 01/05/11: Eric Smith: Re: Asynchronous Compare
31097: 01/05/11: Peter Alfke: Re: Asynchronous Compare
31111: 01/05/11: John_H: Re: Asynchronous Compare
31088: 01/05/11: Mike DeLaney: using FPGAs in communication products....
31092: 01/05/11: <hamish@cloud.net.au>: Nasty "register ordering" in map
31151: 01/05/13: Patrick Muller: Re: Nasty "register ordering" in map
31181: 01/05/14: John_H: Re: Nasty "register ordering" in map
31351: 01/05/20: <hamish@cloud.net.au>: Re: Nasty "register ordering" in map
31210: 01/05/15: <hamish@cloud.net.au>: Re: Nasty "register ordering" in map
31093: 01/05/11: Matthias Fuchs: SpartanII: non clock pad drives clock net ?
31095: 01/05/11: Carsten N?ding: Re: SpartanII: non clock pad drives clock net ?
31098: 01/05/11: Catalin Baetoniu: Re: SpartanII: non clock pad drives clock net ?
31099: 01/05/11: Tim Jaynes: Re: SpartanII: non clock pad drives clock net ?
31100: 01/05/11: Falk Brunner: Re: SpartanII: non clock pad drives clock net ?
31109: 01/05/12: Ken Barr: Re: SpartanII: non clock pad drives clock net ?
32785: 01/07/09: Andrew Barnes: Re: SpartanII: non clock pad drives clock net ?
32788: 01/07/09: Magnus Homann: Re: SpartanII: non clock pad drives clock net ?
32832: 01/07/10: Andrew Barnes: Re: SpartanII: non clock pad drives clock net ?
34713: 01/09/04: John: Re: SpartanII: non clock pad drives clock net ?
31094: 01/05/11: Matthias Weingart: How to program a mach 4? How to get a chain file?
31101: 01/05/11: Jo Parmer: FPGA Design Engineer-Austin, TX
31105: 01/05/11: A. I. Khan: Implementation Of LUT in Vertex-E
31117: 01/05/12: Falk Brunner: Re: Implementation Of LUT in Vertex-E
31123: 01/05/12: Erik Widding: Re: Implementation Of LUT in Vertex-E
31126: 01/05/12: Kolja Sulimma: Re: Implementation Of LUT in Vertex-E
31144: 01/05/13: Lasse Langwadt Christensen: Re: Implementation Of LUT in Vertex-E
31183: 01/05/14: Falk Brunner: Re: Implementation Of LUT in Vertex-E
31197: 01/05/14: Falk Brunner: Re: Implementation Of LUT in Vertex-E
31107: 01/05/11: vikram m n rao: Clock Waveform
31108: 01/05/12: Peter Alfke: Re: Clock Waveform
31112: 01/05/12: Michael w-y Lai: How to make FPGA_Express recongize my RAM code? Urgent.....
31156: 01/05/13: Tim: Re: How to make FPGA_Express recongize my RAM code? Urgent.....
31113: 01/05/12: Roger.chen: Post timing: $setup( negedge RST:1372505 ps, posed
31180: 01/05/14: Brian Philofsky: Re: Post timing: $setup( negedge RST:1372505 ps, posed
31133: 01/05/12: Chris Eilbeck: Xilinx and Actel
31194: 01/05/14: Tom: Re: Xilinx and Actel
31262: 01/05/16: Chris Eilbeck: Re: Xilinx and Actel
31198: 01/05/14: Duane Clark: Re: Xilinx and Actel
31202: 01/05/14: rk: Re: Xilinx and Actel
31263: 01/05/16: Chris Eilbeck: Re: Xilinx and Actel
31279: 01/05/17: Ray Andraka: Re: Xilinx and Actel
31135: 01/05/12: Meelis Kuris: Fine phase shift in Virtex2
31164: 01/05/13: Austin Lesea: Re: Fine phase shift in Virtex2
31168: 01/05/14: Meelis Kuris: Re: Fine phase shift in Virtex2
31184: 01/05/14: Austin Lesea: Re: Fine phase shift in Virtex2
31185: 01/05/14: Austin Lesea: Re: Fine phase shift in Virtex2
31186: 01/05/14: Austin Lesea: Re: Fine phase shift in Virtex2
31182: 01/05/14: Brian Philofsky: Re: Fine phase shift in Virtex2
31204: 01/05/15: Meelis Kuris: Re: Fine phase shift in Virtex2
31218: 01/05/15: Brian Philofsky: Re: Fine phase shift in Virtex2
31233: 01/05/16: Srinivasan Venkataramanan: Re: Fine phase shift in Virtex2
31303: 01/05/18: Ray Andraka: Re: Fine phase shift in Virtex2
31234: 01/05/16: Alan Fitch: Re: Fine phase shift in Virtex2
31138: 01/05/12: <pxwwxp@you.com>: Meet others in you area tonight!! Free AD placement!
31145: 01/05/13: Paul McCanny: VirtexblockRAM bug
31330: 01/05/19: Rob Weinstein: Re: VirtexblockRAM bug
31146: 01/05/13: Dave Feustel: Avnet Virtex-E Development Kit
31153: 01/05/13: Muzaffer Kal: Re: Avnet Virtex-E Development Kit
31157: 01/05/13: sadadasdsa: Re: Avnet Virtex-E Development Kit
31161: 01/05/14: Muzaffer Kal: Re: Avnet Virtex-E Development Kit
31277: 01/05/16: asfsdfrewrew: Re: Avnet Virtex-E Development Kit
31148: 01/05/13: <qnnmoq@you.com>: Find your sole mate here!! Post your FREE personal ADs here!
31149: 01/05/13: Dave Feustel: Getting Started with FPGAs
31178: 01/05/14: <NOj.duranNO@bcn.NOservicom.es>: Re: Getting Started with FPGAs
31284: 01/05/17: Richard Meester: Re: Getting Started with FPGAs
31314: 01/05/18: Dave Feustel: Re: Getting Started with FPGAs
31291: 01/05/17: Tony Burch: Re: Getting Started with FPGAs
31313: 01/05/18: Dave Feustel: Re: Getting Started with FPGAs
31154: 01/05/13: Victor Schutte: Re: 8051 microcontroller
31159: 01/05/13: Erik Larsen: Registers/Latches in Lattice ispLSI1024EA???
31160: 01/05/13: PeckPeck2: 8051 microcontroller
31162: 01/05/14: <cyncsm@you.com>: Find your sole mate here!! Post your FREE personal ADs here!
31166: 01/05/14: Miha Dolenc: FREE IP CORES
31219: 01/05/15: Michael Strothjohann: Re: FREE IP CORES
31221: 01/05/15: Eric Smith: Re: FREE IP CORES
31278: 01/05/16: asfsdfrewrew: Re: FREE IP CORES
31167: 01/05/14: Rick Filipkiewicz: Bizarre PAR phenomenon
31239: 01/05/16: Utku Ozcan: Re: Bizarre PAR phenomenon
31241: 01/05/16: Rick Filipkiewicz: Re: Bizarre PAR phenomenon
31258: 01/05/16: Newsbrowser: Re: Bizarre PAR phenomenon
31266: 01/05/16: Rick Filipkiewicz: Re: Bizarre PAR phenomenon
31169: 01/05/14: Gareth: Huffman decoders
31176: 01/05/14: Kolja Sulimma: Re: Huffman decoders
31170: 01/05/14: Jaan Sirp: Bug in Xilinx Hardware Debugger?
31175: 01/05/14: Jaan Sirp: Re: Bug in Xilinx Hardware Debugger?
31172: 01/05/14: Michael w-y Lai: how to transfer startup cell to gates
31173: 01/05/14: Meelis Kuris: free simulator
31211: 01/05/15: <hamish@cloud.net.au>: Re: free simulator
31338: 01/05/19: Tom Dillon: Re: free simulator
31370: 01/05/21: Ray Andraka: Re: free simulator
31385: 01/05/21: Dave Feustel: Re: free simulator
31394: 01/05/21: Ray Andraka: Re: free simulator
31420: 01/05/22: Jeff Cunningham: Aldec, Synplify (was: free simulator)
31467: 01/05/26: Dave Feustel: Re: free simulator
31489: 01/05/28: Kent Orthner: Re: free simulator
31545: 01/05/29: Dave Feustel: Re: free simulator
31179: 01/05/14: zinger: test
31187: 01/05/14: vi: Quad Decoder
31188: 01/05/14: Eric: Re: Quad Decoder
31189: 01/05/14: vi: Re: Quad Decoder
31191: 01/05/14: Eric: Re: Quad Decoder
31193: 01/05/14: vi: Re: Quad Decoder
31195: 01/05/14: Eric: Re: Quad Decoder
31196: 01/05/14: Eric: Re: Quad Decoder
31208: 01/05/15: Matthias Weingart: Re: Quad Decoder
31212: 01/05/15: Allan Herriman: Re: Quad Decoder
31190: 01/05/14: Sudhir Sakhuja: unix!
31192: 01/05/14: Sudhir Sakhuja: Unix!!!!!!!!!!
31199: 01/05/14: <sasx888er_666@yahoo.com>: Important News
31203: 01/05/15: ƒIƒzƒLç³ƒ“: vertex echo PLL logic
31205: 01/05/15: Marcel Wattinger: Virtex Handbook
31206: 01/05/15: Norbert Bierlox: Re: Virtex Handbook
31207: 01/05/15: Roy Shoshani: Leonardo Spectrum Level 1 vs Level 3
31220: 01/05/15: Muzaffer Kal: Re: Leonardo Spectrum Level 1 vs Level 3
31235: 01/05/16: Alan Fitch: Re: Leonardo Spectrum Level 1 vs Level 3
31209: 01/05/15: John Janssen: Where to get a FREE IP-core for PCI 2.1 ?
31214: 01/05/15: Meelis Kuris: CLKFX of DCM stops working.
31222: 01/05/15: Tim Jaynes: Re: CLKFX of DCM stops working.
31215: 01/05/15: norman yang: BUFG in Virtex_E
31216: 01/05/15: Meelis Kuris: Re: BUFG in Virtex_E
31223: 01/05/15: Pete Dudley: Re: BUFG in Virtex_E
31217: 01/05/15: Noddy: Can't drive?
31232: 01/05/16: Klaus Falser: Re: Can't drive?
31224: 01/05/15: cyber_spook: PCI The Real Hardware
31242: 01/05/16: Iwo Mergler: Re: PCI The Real Hardware
31254: 01/05/16: Falk Brunner: Re: PCI The Real Hardware
31261: 01/05/16: Keith R. Williams: Re: PCI The Real Hardware
31292: 01/05/17: Iwo Mergler: Re: PCI The Real Hardware
31300: 01/05/17: cyber_spook: Re: PCI The Real Hardware
31256: 01/05/16: Steve Rencontre: Re: PCI The Real Hardware
31260: 01/05/16: Tom Verbeure: Re: PCI The Real Hardware
31271: 01/05/16: cyber_spook: Re: PCI The Real Hardware
31274: 01/05/16: Tom Verbeure: Re: PCI The Real Hardware
31270: 01/05/16: Austin Franklin: Re: PCI The Real Hardware
31225: 01/05/15: vi: Comparator
31251: 01/05/16: Falk Brunner: Re: Comparator
31227: 01/05/15: <contactus@bargainshotline.com>: BargainsHotLine.com New Free Way To SAVE $ MONEY $
31230: 01/05/16: Michael Kohne: Counter problem in Altera AHDL...
31257: 01/05/16: Steve Rencontre: Re: Counter problem in Altera AHDL...
31356: 01/05/20: John_H: Re: Counter problem in Altera AHDL...
31236: 01/05/16: Brendan Lynskey: Handel C question
31238: 01/05/16: Brendan Lynskey: Re: Handel C question
31237: 01/05/16: bhupesh: interfacing:keyboard/displays
31299: 01/05/18: Jim Granville: Re: interfacing:keyboard/displays
31243: 01/05/16: S.JULHES: help for BGA ?
31306: 01/05/17: Jeff Cunningham: Re: help for BGA ?
31244: 01/05/16: Harvey Twyman: PROGRAMMABLE LOGIC SEQUENCER CORRECTIONS
31252: 01/05/16: Peter Alfke: Re: PROGRAMMABLE LOGIC SEQUENCER CORRECTIONS
31267: 01/05/16: Rick Filipkiewicz: Re: PROGRAMMABLE LOGIC SEQUENCER CORRECTIONS
31245: 01/05/16: Valeri Serebrianski: RE: Counter problem in Altera AHDL...
31247: 01/05/16: Michael Kohne: Re: Counter problem in Altera AHDL...
31246: 01/05/16: Jean-Pierre Gehrig: XilinxCoreLib with Renoir
31253: 01/05/16: Vaughn Adams: Re: XilinxCoreLib with Renoir
31374: 01/05/21: Chandramohan Sateesh: Re: XilinxCoreLib with Renoir
31248: 01/05/16: Andrew Webb: Ideas for Faster XILINX compilations ?
31255: 01/05/16: Falk Brunner: Re: Ideas for Faster XILINX compilations ?
31259: 01/05/16: Brant Soudan: Re: Ideas for Faster XILINX compilations ?
31275: 01/05/16: Tim: Re: Ideas for Faster XILINX compilations ?
31268: 01/05/16: Austin Lesea: Re: Ideas for Faster XILINX compilations ?
31269: 01/05/16: Rick Filipkiewicz: Re: Ideas for Faster XILINX compilations ?
31283: 01/05/17: Andrew Webb: Re: Ideas for Faster XILINX compilations ?
31294: 01/05/17: David Hawke: Re: Ideas for Faster XILINX compilations ?
31249: 01/05/16: Miha Dolenc: OPEN CORES design GUIDELINES
31272: 01/05/16: Roy White: Xilinx Service Pack 8 Now Available
31273: 01/05/16: Peter Alfke: Re: Xilinx Service Pack 8 Now Available
31276: 01/05/17: Kolja Sulimma: Re: Xilinx Service Pack 8 Now Available
31387: 01/05/21: Arthur Yang: Re: Xilinx Service Pack 8 Now Available
31325: 01/05/18: Les S Brodie: Re: Xilinx Service Pack 8 Now Available
31329: 01/05/19: Kent Orthner: Re: Xilinx Service Pack 8 Now Available
31332: 01/05/19: Chris G. Schneider: Re: Xilinx Service Pack 8 Now Available
31352: 01/05/20: <hamish@cloud.net.au>: Re: Xilinx Service Pack 8 Now Available
31280: 01/05/17: amey hegde: Digital PLL (DPLL) design help
31289: 01/05/17: Meelis Kuris: Re: Digital PLL (DPLL) design help
31290: 01/05/17: Charles Gardiner: Re: Digital PLL (DPLL) design help
31307: 01/05/18: amey hegde: Re: Digital PLL (DPLL) design help
31327: 01/05/18: asfsdfrewrew: Re: Digital PLL (DPLL) design help
31339: 01/05/19: John_H: Re: Digital PLL (DPLL) design help
31281: 01/05/16: Jawahar Ali: PowerPC
31285: 01/05/17: Utku Ozcan: Synplify: warnings for Verilog blackbox in VHDL
31305: 01/05/17: Ken McElvain: Re: Synplify: warnings for Verilog blackbox in VHDL
31310: 01/05/18: Utku Ozcan: Re: Synplify: warnings for Verilog blackbox in VHDL
31316: 01/05/18: Ken McElvain: Re: Synplify: warnings for Verilog blackbox in VHDL
31286: 01/05/17: Alan Glynne Jones: Xilinx Coolrunner 100% routable - but the tools aren't
31295: 01/05/17: Mark Ng: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31309: 01/05/18: Alan Glynne Jones: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31366: 01/05/21: Alan Glynne Jones: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31463: 01/05/25: Peter: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31464: 01/05/25: Peter Alfke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31727: 01/06/04: Richard Dungan: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31729: 01/06/04: Peter Alfke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31730: 01/06/04: Peter Alfke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31742: 01/06/04: Dave Vanden Bout: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31743: 01/06/05: Peter Alfke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31465: 01/05/25: Peter Alfke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31498: 01/05/28: Paul Taylor: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31526: 01/05/29: Ulf Samuelsson: Re: Xilinx Coolrunner 100% routable - but the tools aren't
32113: 01/06/14: David Hawke: Re: Xilinx Coolrunner 100% routable - but the tools aren't
31287: 01/05/17: Lisa Warren: Re Xilinx 1553 Interface
31288: 01/05/17: <x@thevoter.co.uk>: The Voter 4957
31293: 01/05/17: Gerald B: cPCI upper clamp diode
31296: 01/05/17: Peter Alfke: Plenty of technical info is available...
31304: 01/05/17: Jeff Cunningham: Can anyone comment on the difference between modelsim PE and XE
31320: 01/05/18: Mike Treseler: Re: Can anyone comment on the difference between modelsim PE and XE
31328: 01/05/18: asfsdfrewrew: Re: Can anyone comment on the difference between modelsim PE and XE
31346: 01/05/20: Rick Collins: Re: Can anyone comment on the difference between modelsim PE and XE
31355: 01/05/20: Marko: Re: Can anyone comment on the difference between modelsim PE and XE
31433: 01/05/23: Mike Treseler: Re: Can anyone comment on the difference between modelsim PE and XE
32179: 01/06/18: Dave Colson: Flexlm license and windows 2000
32182: 01/06/18: Mike Treseler: Re: Flexlm license and windows 2000
32186: 01/06/18: Ulf Samuelsson: Re: Flexlm license and windows 2000
32195: 01/06/18: Lasse Langwadt Christensen: Re: Flexlm license and windows 2000
31308: 01/05/18: mike: eprom configuration
31311: 01/05/18: Tadej: PCI IP Core spec AVAILABLE !
31312: 01/05/18: <u644866943@spawnkill.ip-mobilphone.net>: Xilinx PCI macro problems
31344: 01/05/19: Eric Crabill: Re: Xilinx PCI macro problems
31318: 01/05/18: Dan Connors: MICRO-34 Call for Papers - Six weeks until submission June 22
31319: 01/05/18: Joe Gentile, III: FPGA consultant needed
31337: 01/05/19: Eric: Re: FPGA consultant needed
31341: 01/05/19: Rick Filipkiewicz: Re: FPGA consultant needed
31359: 01/05/21: Eric: Re: FPGA consultant needed
31390: 01/05/22: Rick Filipkiewicz: Re: FPGA consultant needed
31437: 01/05/23: Austin Franklin: Re: FPGA consultant needed
31345: 01/05/19: Eric Crabill: Re: FPGA consultant needed
31360: 01/05/21: Eric: Re: FPGA consultant needed
31375: 01/05/21: John_H: Re: FPGA consultant needed
31377: 01/05/21: Eric Crabill: Re: FPGA consultant needed
31438: 01/05/24: Kevin Neilson: Re: FPGA consultant needed
31510: 01/05/28: Austin Franklin: Re: FPGA consultant needed
31556: 01/05/30: Kevin Neilson: Re: FPGA consultant needed
31590: 01/05/30: Austin Franklin: Re: FPGA consultant needed
31321: 01/05/18: Dave Feustel: Re: CDROMs with Free tools and designs
31322: 01/05/18: Jamil Khatib: CDROMs with Free tools and designs
31340: 01/05/19: Dr. Vitit Kantabutra: Re: CDROMs with Free tools and designs
31324: 01/05/18: julia: Tutorial
31333: 01/05/19: Chris G. Schneider: Re: Tutorial
31901: 01/06/07: Asfandyar Khan: Re: Tutorial
31326: 01/05/19: Stephen du Toit: Xilinx Webfitter fails with exit code 0002
31331: 01/05/19: Rick Filipkiewicz: Re: Xilinx Webfitter fails with exit code 0002
31334: 01/05/19: David Nyarko: Xilinx 16-point FFT core problem
31335: 01/05/19: Steven J. Ackerman: Any Triscend E5 (8051 core w/FPGA) Users ?
31336: 01/05/19: Dave Vanden Bout: Re: Any Triscend E5 (8051 core w/FPGA) Users ?
31342: 01/05/19: Dr. Vitit Kantabutra: Does anyone have fpga technology code for Atmel AT40 on Electric?
31343: 01/05/20: <sasx888er_666@yahoo.com>: ANNA KOURNAKOVA - NEW BEST PIX!!!
31358: 01/05/21: <iam@deathsdoor.fsworld.co.uk>: Spambot Fodder - Dont Bother To Read - Thanks
31361: 01/05/21: Frederic Darre: Need A little prog?
31362: 01/05/21: frederik: Re: Need A little prog?
31364: 01/05/21: Frederic Darre: Re: Need A little prog?
31453: 01/05/25: Martin Schoeberl: Re: Need A little prog?
31372: 01/05/21: Victor Schutte: Re: Need A little prog?
31363: 01/05/21: Vivian: Xilinx tools
31365: 01/05/21: Steven Derrien: Interfacing with serial port
31369: 01/05/21: Frederic Darre: Re: Interfacing with serial port
31371: 01/05/21: Steven Derrien: Re: Interfacing with serial port
31367: 01/05/21: "elvira catherina": <no subject>
31380: 01/05/21: Keith R. Williams: Re: <no subject>
31368: 01/05/21: C.Schlehaus: JTAG and Debugging
31378: 01/05/21: Steve Rencontre: Re: JTAG and Debugging
31386: 01/05/21: C.Schlehaus: Re: JTAG and Debugging
31388: 01/05/21: C.Schlehaus: Re: JTAG and Debugging
31406: 01/05/22: Steve Rencontre: Re: JTAG and Debugging
31373: 01/05/21: Utku Ozcan: Synplicity newsgroup?
31383: 01/05/21: Muzaffer Kal: Re: Synplicity newsgroup?
31391: 01/05/22: Rick Filipkiewicz: Re: Synplicity newsgroup?
31396: 01/05/22: Utku Ozcan: Re: Synplicity newsgroup?
31376: 01/05/21: Jimmie: Maximum clock frequency to expect in Xilinx Virtex FPGA ?
31379: 01/05/21: n#: Re: Maximum clock frequency to expect in Xilinx Virtex FPGA ?
31392: 01/05/22: Rick Filipkiewicz: Re: Maximum clock frequency to expect in Xilinx Virtex FPGA ?
31381: 01/05/21: n#: RLocs on Inferred registers??
31402: 01/05/22: <hamish@cloud.net.au>: Re: RLocs on Inferred registers??
31409: 01/05/22: n#: Re: RLocs on Inferred registers??
31429: 01/05/23: <hamish@cloud.net.au>: Re: RLocs on Inferred registers??
31484: 01/05/27: Muzaffer Kal: Re: RLocs on Inferred registers??
31382: 01/05/21: Jennifer Walton: Hardware Engineer-RTOS,PLD,VXworks,fibre channel
31389: 01/05/21: Dave Feustel: LFSR Taps for 64 bit registers?
31393: 01/05/21: Mark Curry: Re: LFSR Taps for 64 bit registers?
31395: 01/05/22: Peter Alfke: Re: LFSR Taps for 64 bit registers?
31397: 01/05/22: Pjc: fast divider
31412: 01/05/22: glen herrmannsfeldt: Re: fast divider
31421: 01/05/23: Peter Alfke: Re: fast divider
31432: 01/05/23: eteam: Re: fast divider
31410: 01/05/22: Tim Jaynes: Re: LFSR Taps for 64 bit registers?
32279: 01/06/21: Subbu Meiyappan: Re: LFSR Taps for 64 bit registers?
32286: 01/06/22: Ray Andraka: Re: LFSR Taps for 64 bit registers?
32329: 01/06/23: glen herrmannsfeldt: Re: LFSR Taps for 64 bit registers?
32352: 01/06/24: Bitter Spock: Re: LFSR Taps for 64 bit registers?
31398: 01/05/22: Gonzalo Arana: xilinx webpack problem
31400: 01/05/22: Kent Orthner: Re: xilinx webpack problem
31418: 01/05/22: Gonzalo Arana: Re: xilinx webpack problem
31439: 01/05/24: Kent Orthner: Re: xilinx webpack problem
31466: 01/05/26: Gonzalo Arana: Re: xilinx webpack problem
31399: 01/05/22: Steven Sanders: Xilinx PCI JTAG programming
31404: 01/05/22: Muzaffer Kal: Re: Xilinx PCI JTAG programming
31401: 01/05/22: Marc-Eric Uldry: inout signals between Viewdraw schematics and VHDL components
31403: 01/05/22: Martin: Counter problem
31408: 01/05/22: Meelis Kuris: Re: Counter problem
31413: 01/05/22: Ray Andraka: Re: Counter problem
31411: 01/05/22: John_H: Re: Counter problem
31414: 01/05/22: Martin: Re: Counter problem
31419: 01/05/23: Ray Andraka: Re: Counter problem
31426: 01/05/23: Stephane: Re: Counter problem
31428: 01/05/23: Martin: Re: Counter problem
34891: 01/09/13: cnspy: Re: Counter problem
34902: 01/09/13: Falk: Re: Counter problem
31405: 01/05/22: julia: FPGA
31415: 01/05/22: Tom: Re: FPGA
31452: 01/05/25: Martin Schoeberl: Re: FPGA
31460: 01/05/25: Luk Michel St.Onge: Re: FPGA
31407: 01/05/22: Robert Siegmund: VIRTEX and dynamic reconfiguration
31416: 01/05/22: A. I. Khan: How to handle/store partial product in Core generator ?
31417: 01/05/22: Shawki Areibi: ANN Implementations (Suitable FPGA Platform)
31422: 01/05/23: Michael w-y Lai: replace_fpga problem
31423: 01/05/23: Zdenka Safarzik: LCD/CRT video controller and whole MMI in FPGA
31424: 01/05/23: Miha Dolenc: Block Select RAM+ Memory and NCSim
31904: 01/06/08: Kant Kong: Re: Block Select RAM+ Memory and NCSim
31425: 01/05/23: Richard Meester: SPARTANII prototype boards + microcontroller available
31427: 01/05/23: Stefaan Vanheesbeke: RS422 - RS485 conversion
31430: 01/05/23: Vivian: block diagrams
31431: 01/05/23: Dave Feustel: FPGA Setup/Configuration Documentation
31434: 01/05/23: Dave Feustel: C Source for BOOZER (BOOlean ZEro-one Reduction) Program
31435: 01/05/23: vi: frequency ramp
31436: 01/05/23: John Fields: Re: frequency ramp
31440: 01/05/24: Paul Burke: Re: frequency ramp
31444: 01/05/24: Ray Andraka: Re: frequency ramp
31445: 01/05/24: RP Henry: Re: frequency ramp
31446: 01/05/24: Jim_Thompson: Re: frequency ramp
31447: 01/05/24: vi: Re: frequency ramp
31451: 01/05/25: Jim Granville: Re: frequency ramp
31441: 01/05/24: g. giachella: Altera APEX internal signal coupling ?
31442: 01/05/24: Tadej: PCI core PROGRESS
31443: 01/05/24: Nikhil Kumar Mittal: Need allegro footprint for Intel's IXP1200 ?
31448: 01/05/24: Tom Verbeure: Re: Vhdl coding style for fpga
31449: 01/05/24: Jamil Khatib: Vhdl coding style for fpga
31450: 01/05/24: eteam: spartan xl rise/fall time ?
31457: 01/05/25: Austin Lesea: Re: spartan xl rise/fall time ?
31458: 01/05/25: Bob Perlman: Re: spartan xl rise/fall time ?
31454: 01/05/25: Richard Meester: JTAG source
31455: 01/05/25: Dave Feustel: Re: JTAG source
31461: 01/05/25: cyber_spook: Re: JTAG source
31456: 01/05/25: Meelis Kuris: who needs clk180
31639: 01/06/01: Rémi SEGLIE: Re: who needs clk180
32092: 01/06/13: Jason T. Wright: Re: who needs clk180
31459: 01/05/25: PROCOM: Jobs ASIC / FPGA / VLSI designers needed - Canada
31462: 01/05/25: Speedy Zero Two: xilinx webpack warning !!
31488: 01/05/28: Kent Orthner: Re: xilinx webpack warning !!
31495: 01/05/28: Gonzalo Arana: Re: xilinx webpack warning !!
31506: 01/05/28: mjd001: Re: xilinx webpack warning !!
31511: 01/05/29: Peter Alfke: Re: xilinx webpack warning !!
31520: 01/05/29: Rick Filipkiewicz: Re: xilinx webpack warning !!
31521: 01/05/29: Allan Herriman: Re: xilinx webpack warning !!
31523: 01/05/29: Kolja Sulimma: Re: xilinx webpack warning !!
31539: 01/05/29: Peter Alfke: Re: xilinx webpack warning !!
31536: 01/05/29: Peter Alfke: Re: xilinx webpack warning !!
31535: 01/05/29: Speedy Zero Two: Re: xilinx webpack warning !!
31468: 01/05/26: Philip Freidin: The FAQ is Live and so is the Archive
31475: 01/05/27: Peter Alfke: New Xilinx data book Frisbee
31478: 01/05/27: Tim: Re: New Xilinx data book Frisbee
31501: 01/05/28: Peter Alfke: Re: New Xilinx data book Frisbee
31533: 01/05/29: Brian Dipert: Re: The FAQ is Live and so is the Archive
31469: 01/05/26: Henning Trispel: Xilinx XC4010E Problem
31471: 01/05/27: Peter Alfke: Re: Xilinx XC4010E Problem
31474: 01/05/27: Peter Alfke: Re: Xilinx XC4010E Problem
31609: 01/05/31: Austin Franklin: Re: Xilinx XC4010E Problem
31620: 01/05/31: Rick Filipkiewicz: Re: Xilinx XC4010E Problem
31628: 01/05/31: Austin Franklin: Re: Xilinx XC4010E Problem
31629: 01/06/01: Rick Filipkiewicz: Re: Xilinx XC4010E Problem
31656: 01/06/01: Eric Smith: Re: Xilinx XC4010E Problem
31662: 01/06/02: Neil Franklin: Re: Xilinx XC4010E Problem
31726: 01/06/04: Peter Alfke: Re: Xilinx XC4010E Problem
31480: 01/05/27: Henning Trispel: Re: Xilinx XC4010E Problem
31470: 01/05/26: Jamil Khatib: Internal tri states
31472: 01/05/27: Peter Alfke: Re: Internal tri states
31490: 01/05/28: Kent Orthner: Re: Internal tri states
31491: 01/05/27: Peter Alfke: Re: Internal tri states
31479: 01/05/28: Tony Burch: Re: Internal tri states
31481: 01/05/27: Peter Alfke: Re: Internal tri states
31493: 01/05/28: Tony Burch: Re: Internal tri states
31473: 01/05/27: James Brennan: JPEG cores
31476: 01/05/27: T-Online: Fragen zu PCI und FPGA
31482: 01/05/27: Peter Alfke: Re: Fragen zu PCI und FPGA
31530: 01/05/29: Joerg Ritter: Re: Fragen zu PCI und FPGA
31557: 01/05/30: Kevin Neilson: Re: Fragen zu PCI und FPGA
31560: 01/05/30: T-Online: Re: Fragen zu PCI und FPGA
31574: 01/05/30: Kevin Neilson: Re: Fragen zu PCI und FPGA
31576: 01/05/30: T-Online: Re: Fragen zu PCI und FPGA
31477: 01/05/27: Markus Dobschall: dual channel NCO in Xilinx VirtexE
31483: 01/05/27: T-Online: Help for PCI and FPGA
31486: 01/05/27: Kuan Zhou: Help on LVDS
31519: 01/05/29: Klaus Falser: Re: Help on LVDS
31531: 01/05/29: Joerg Ritter: Re: Help for PCI and FPGA
31485: 01/05/27: Alfred M.: ORCAD Capture Symbols
31547: 01/05/29: bob elkind: Re: ORCAD Capture Symbols
31548: 01/05/30: Chris Eilbeck: Re: ORCAD Capture Symbols
31549: 01/05/29: bob elkind: Re: ORCAD Capture Symbols
31550: 01/05/30: Chris Eilbeck: Re: ORCAD Capture Symbols
31554: 01/05/29: bob elkind: Re: ORCAD Capture Symbols
31563: 01/05/30: Rotem Gazit: Re: ORCAD Capture Symbols
31565: 01/05/30: Chris Eilbeck: Re: ORCAD Capture Symbols
31487: 01/05/28: Peter J. Ashenden: APChDL-2001/SLDL-2001 call for papers
31492: 01/05/28: Muzaffer Kal: RLOC_RANGE problem with Virtex-II ?
31494: 01/05/28: Kent Orthner: Fun with DLLs.
31502: 01/05/28: Falk Brunner: Re: Fun with DLLs.
31508: 01/05/29: Peter Alfke: Re: Fun with DLLs.
31522: 01/05/29: Anders Ramdahl: Re: Fun with DLLs.
31537: 01/05/29: Peter Alfke: Re: Fun with DLLs.
31552: 01/05/30: Kent Orthner: Re: Fun with DLLs.
31555: 01/05/30: Peter Alfke: Re: Fun with DLLs.
31558: 01/05/30: Kent Orthner: Re: Fun with DLLs.
31514: 01/05/28: Austin Lesea: Re: Fun with DLLs.
31551: 01/05/29: K.: Re: Fun with DLLs.
31567: 01/05/30: Allan Herriman: Re: Fun with DLLs.
31570: 01/05/30: Austin Lesea: Re: Fun with DLLs.
31586: 01/05/31: Kent Orthner: Re: Fun with DLLs.
31589: 01/05/31: Allan Herriman: Re: Fun with DLLs.
31610: 01/05/31: Austin Lesea: Re: Fun with DLLs.
31496: 01/05/28: Gonzalo Arana: silly question (xilinx - webpack - mask file)
31497: 01/05/28: Aaron Nabil: Want to buy: Old copy of ABEL, Synario or ViewPLD
31499: 01/05/28: Win Hill: Re: Want to buy: Old copy of ABEL, Synario or ViewPLD
31513: 01/05/29: Ed: Re: Want to buy: Old copy of ABEL, Synario or ViewPLD
31518: 01/05/29: Jim Granville: Re: Want to buy: Old copy of ABEL, Synario or ViewPLD
31524: 01/05/29: Aaron Nabil: Re: Want to buy: Old copy of ABEL, Synario or ViewPLD
31543: 01/05/30: Jim Granville: Re: Want to buy: Old copy of ABEL, Synario or ViewPLD
31500: 01/05/28: SN: what cables and softwares do you need to use "Xilinx FPGA Demonstration Evaluation Board"?
31503: 01/05/28: Rick Filipkiewicz: Re: what cables and softwares do you need to use "Xilinx FPGA
31516: 01/05/29: Tony Burch: Re: what cables and softwares do you need to use "Xilinx FPGA Demonstration Evaluation Board"?
31504: 01/05/28: Philip Freidin: Re: what cables and softwares do you need to use "Xilinx FPGA Demonstration Evaluation Board"?
31515: 01/05/29: **** ****: Re: what cables and softwares do you need to use "Xilinx FPGA Demonstration Evaluation Board"?
31532: 01/05/29: Martin Schoeberl: Re: what cables and softwares do you need to use "Xilinx FPGA Demonstration Evaluation Board"?
31507: 01/05/28: mjd001: Xilinx Reset
31509: 01/05/29: Peter Alfke: Re: Xilinx Reset
31512: 01/05/29: <jjoker@aol.com>: Make a little extra cash !!!
31517: 01/05/29: Naohiko Shimizu: My80-- i8080A instruction compatible processor core
31528: 01/05/29: Mark Walter: Re: My80-- i8080A instruction compatible processor core
31631: 01/06/01: Richard Erlacher: Re: My80-- i8080A instruction compatible processor core
31636: 01/06/01: CBFalconer: Re: My80-- i8080A instruction compatible processor core
31665: 01/06/01: Iouri Besperstov: Re: My80-- i8080A instruction compatible processor core
31666: 01/06/02: CBFalconer: Re: My80-- i8080A instruction compatible processor core
31681: 01/06/02: Iouri Besperstov: Re: My80-- i8080A instruction compatible processor core
31922: 01/06/08: Jack Crenshaw: Re: My80-- i8080A instruction compatible processor core
31690: 01/06/03: Richard Erlacher: Re: My80-- i8080A instruction compatible processor core
31645: 01/06/01: Ulf Samuelsson: Re: My80-- i8080A instruction compatible processor core
31735: 01/06/05: Naohiko Shimizu: Re: My80-- i8080A instruction compatible processor core
31525: 01/05/29: Peter Lang: Spartan2 PCI-IP Core @ power-up
31529: 01/05/29: Kolja Sulimma: Re: Spartan2 PCI-IP Core @ power-up
31571: 01/05/30: Zimba: Re: Spartan2 PCI-IP Core @ power-up
31612: 01/05/31: Austin Franklin: Re: Spartan2 PCI-IP Core @ power-up
31638: 01/06/01: Zimba: Re: Spartan2 PCI-IP Core @ power-up
31670: 01/06/02: Austin Franklin: Re: Spartan2 PCI-IP Core @ power-up
31674: 01/06/02: Kolja Sulimma: Re: Spartan2 PCI-IP Core @ power-up
31675: 01/06/02: Magnus Homann: Re: Spartan2 PCI-IP Core @ power-up
31676: 01/06/02: Kolja Sulimma: Re: Spartan2 PCI-IP Core @ power-up
31678: 01/06/02: Magnus Homann: Re: Spartan2 PCI-IP Core @ power-up
31693: 01/06/03: Austin Franklin: Re: Spartan2 PCI-IP Core @ power-up
31527: 01/05/29: Shane Tow: Xilinx Installation and Java Errors on Pentium 4
31562: 01/05/30: Lasse Langwadt Christensen: Re: Xilinx Installation and Java Errors on Pentium 4
31569: 01/05/30: Shane Tow: Re: Xilinx Installation and Java Errors on Pentium 4
31534: 01/05/29: erika: ignore
31538: 01/05/29: Philip Freidin: Searching the Archive
31540: 01/05/29: Greg Cary: Peripheral for Microcontroller
31541: 01/05/29: Ulf Samuelsson: Re: Peripheral for Microcontroller
31542: 01/05/29: Eric Smith: Re: Peripheral for Microcontroller
31553: 01/05/30: Kent Orthner: Re: Peripheral for Microcontroller
31559: 01/05/30: wei yao: Re: Peripheral for Microcontroller
31544: 01/05/29: Ben Franchuk: Re: Exact URL for ordering Webpack ISE CDROM?
31546: 01/05/29: Ben Franchuk: Re: Exact URL for ordering Webpack ISE CDROM?
31686: 01/06/02: Dave Feustel: Re: Exact URL for ordering Webpack ISE CDROM?
31561: 01/05/30: Frederic Darre: Help with vhd
31566: 01/05/30: Kent Orthner: Re: Help with vhd
31601: 01/05/31: Frederic Darre: Re: Help with vhd
31602: 01/05/31: Kent Orthner: Re: Help with vhd
31603: 01/05/31: Frederic Darre: Re: Help with vhd
31608: 01/05/31: Nicolas Matringe: Re: Help with vhd
31648: 01/06/01: Frederic Darre: Re: Help with vhd
31564: 01/05/30: Huang: Help: RAM clear in one clock cycle
31572: 01/05/30: Ray Andraka: Re: Help: RAM clear in one clock cycle
31578: 01/05/30: eteam: Re: Help: RAM clear in one clock cycle
31579: 01/05/30: John_H: Re: Help: RAM clear in one clock cycle
31618: 01/05/31: Peter Alfke: Re: Help: RAM clear in one clock cycle
31587: 01/05/31: Huang: Re: Help: RAM clear in one clock cycle
31592: 01/05/31: Ray Andraka: Re: Help: RAM clear in one clock cycle
31568: 01/05/30: Roberto R. Osorio: Is anybody using FPGAs for scientific computing?
31573: 01/05/30: Kolja Sulimma: Re: Is anybody using FPGAs for scientific computing?
31582: 01/05/30: Tim: Re: Is anybody using FPGAs for scientific computing?
31604: 01/05/31: Roberto R. Osorio: Re: Is anybody using FPGAs for scientific computing?
31634: 01/05/31: Dave Feustel: Re: Is anybody using FPGAs for scientific computing?
31575: 01/05/30: <muzaffer@dspia.com>: RLOC'in Virtex-II FDCs???
31593: 01/05/31: Ray Andraka: Re: RLOC'in Virtex-II FDCs???
31577: 01/05/30: Rick Filipkiewicz: Foundation 3.3i memory useage
31580: 01/05/30: Kuan Zhou: Help on Xilinx 6200
31642: 01/06/01: Thomas Karlsson: Re: Help on Xilinx 6200
31643: 01/06/01: Thomas Karlsson: Re: Help on Xilinx 6200
31644: 01/06/01: Michael Strothjohann: Re: Help on Xilinx 6200
31651: 01/06/01: Dave Feustel: Re: Help on Xilinx 6200
31663: 01/06/01: Peter Alfke: Re: Help on Xilinx 6200
31668: 01/06/01: Kuan Zhou: Re: Help on Xilinx 6200
31581: 01/05/31: Jean-Paul Smeets: Barrel shifter in Xilinx Virtex-E
31613: 01/05/31: John_H: Re: Barrel shifter in Xilinx Virtex-E
31619: 01/05/31: Peter Alfke: Re: Barrel shifter in Xilinx Virtex-E
31583: 01/05/30: Kris Nichols: IEEE VHDL library support in HDL compilers
31598: 01/05/31: Renaud Pacalet: Re: IEEE VHDL library support in HDL compilers
31605: 01/05/31: Kris Nichols: Re: IEEE VHDL library support in HDL compilers
31584: 01/05/30: Paul Campbell: Re: [Q]setup-time violation
31667: 01/06/02: Ben: Re: [Q]setup-time violation
31682: 01/06/02: Paul Campbell: Re: [Q]setup-time violation
31585: 01/05/31: Chuck Woodring: fct logic and xc4000xl inputs
31606: 01/05/31: Chuck Woodring: Re: fct logic and xc4000xl inputs
31588: 01/05/31: Kent Orthner: PAD to PAD Timing Constraints. (Xilinx)
31599: 01/05/31: fred: Re: PAD to PAD Timing Constraints. (Xilinx)
31614: 01/05/31: John_H: Re: PAD to PAD Timing Constraints. (Xilinx)
31591: 01/05/30: B. Joshua Rosen: Xilinx on Linux Howto Updated
31594: 01/05/31: Ben: [Q]setup-time violation
31595: 01/05/31: Kent Orthner: Re: [Q]setup-time violation
31617: 01/05/31: Peter Alfke: Re: [Q]setup-time violation
31623: 01/05/31: cyber_spook: Re: [Q]setup-time violation
31653: 01/06/01: Johnsonw10: Re: [Q]setup-time violation
31694: 01/06/03: pini: Re: [Q]setup-time violation
31695: 01/06/03: Rick Filipkiewicz: Re: [Q]setup-time violation
31596: 01/05/31: Anthony Ellis: PowerPC?
31600: 01/05/31: Utku Ozcan: Re: PowerPC?
31814: 01/06/06: Anthony Ellis: Re: PowerPC?
31649: 01/06/01: S. Ramirez: Re: PowerPC?
31597: 01/05/31: Alessandro Patalani: EPC2: no output signals
31725: 01/06/04: m: Re: EPC2: no output signals
31607: 01/05/31: Petter Gustad: Xilinx Software Installer on Solaris
31611: 01/05/31: Steven Sanders: PCI to compactPCI adapter
31887: 01/06/07: Lars Erik Svendsen: Re: PCI to compactPCI adapter
31615: 01/05/31: Sandra: Place and Route Tools for Virtex FPGAs
31616: 01/05/31: Jon Schneider: Source of old Altera EPX780s
32511: 01/06/28: Paul Smart: Re: Source of old Altera EPX780s
31621: 01/05/31: Wade D. Peterson: Second source for Altera EPC1 or EPC2 configuration devices
31635: 01/06/01: C.Schlehaus: Re: Second source for Altera EPC1 or EPC2 configuration devices
31622: 01/05/31: Gonzalo Arana: gated clock: simple question
31641: 01/06/01: Klaus Falser: Re: gated clock: simple question
31624: 01/05/31: cyber_spook: Re: Help in FIFO design
31625: 01/05/31: Jamil Khatib: Help in FIFO design
31626: 01/05/31: Eric: Re: Help in FIFO design
31637: 01/06/01: Charles Gardiner: Re: Help in FIFO design
31671: 01/06/02: Austin Franklin: Re: Help in FIFO design
31741: 01/06/05: iglam: Re: Help in FIFO design
31744: 01/06/05: Peter Alfke: Re: Help in FIFO design
31775: 01/06/05: Austin Franklin: Re: Help in FIFO design
31779: 01/06/05: Peter Alfke: Re: Help in FIFO design
31780: 01/06/05: Austin Franklin: Re: Help in FIFO design
31784: 01/06/05: Peter Alfke: Re: Help in FIFO design
31788: 01/06/05: Austin Franklin: Re: Help in FIFO design
31820: 01/06/06: Ben Franchuk: Re: Help in FIFO design
31821: 01/06/06: Ben Franchuk: Re: Help in FIFO design
31831: 01/06/06: Ben Franchuk: Re: Help in FIFO design
31925: 01/06/08: Austin Lesea: Re: Help in FIFO design
31932: 01/06/08: Goran Bilski: Re: Help in FIFO design
31897: 01/06/07: Austin Lesea: Re: Help in FIFO design
31899: 01/06/08: Jim Granville: Re: Help in FIFO design
31880: 01/06/07: Austin Lesea: Re: Help in FIFO design
31832: 01/06/06: glen herrmannsfeldt: Re: Help in FIFO design
31833: 01/06/06: Peter Alfke: Re: Help in FIFO design
31870: 01/06/07: iglam: Re: Help in FIFO design
31875: 01/06/07: Peter Alfke: Re: Help in FIFO design
31881: 01/06/07: iglam: Re: Help in FIFO design
31885: 01/06/07: Peter Alfke: Re: Help in FIFO design
31889: 01/06/07: Rick Filipkiewicz: Re: Help in FIFO design
31894: 01/06/07: cyber_spook: Re: Help in FIFO design
32030: 01/06/11: Falk Brunner: Re: Help in FIFO design
32031: 01/06/11: Falk Brunner: Re: Help in FIFO design
31785: 01/06/05: Eric Smith: Re: Help in FIFO design
31787: 01/06/05: Austin Franklin: Re: Help in FIFO design
31789: 01/06/05: Austin Lesea: Re: Help in FIFO design
31790: 01/06/05: Eric Smith: Re: Help in FIFO design
31807: 01/06/06: Austin Franklin: Re: Help in FIFO design
31811: 01/06/06: Peter Alfke: Re: Help in FIFO design
31837: 01/06/06: Eric Smith: Re: Help in FIFO design
31844: 01/06/06: Austin Franklin: Re: Help in FIFO design
31846: 01/06/06: Eric Smith: Re: Help in FIFO design
31856: 01/06/06: Austin Franklin: Re: Help in FIFO design
31883: 01/06/07: Eric Smith: Re: Help in FIFO design
31886: 01/06/07: Austin Franklin: Re: Help in FIFO design
31891: 01/06/07: cyber_spook: Re: Help in FIFO design
31966: 01/06/10: Magnus Homann: Re: Help in FIFO design
31982: 01/06/10: Hannu Ylioja: Re: Help in FIFO design
31847: 01/06/06: Eric Smith: Re: Help in FIFO design
31855: 01/06/06: Austin Franklin: Re: Help in FIFO design
31845: 01/06/06: Eric Crabill: Re: Help in FIFO design
31892: 01/06/07: cyber_spook: Re: Help in FIFO design
32041: 01/06/11: Don Husby: Gray Code Guard bits (was Re: Help in FIFO design)
32047: 01/06/12: John_H: Re: Gray Code Guard bits (was Re: Help in FIFO design)
32048: 01/06/12: John_H: Re: Gray Code Guard bits (was Re: Help in FIFO design)
32050: 01/06/12: Peter Alfke: Re: Gray Code Guard bits (was Re: Help in FIFO design)
32054: 01/06/12: Keith R. Williams: Re: Gray Code Guard bits (was Re: Help in FIFO design)
31939: 01/06/08: Luke Roth: Re: Cheap FPGA's
31627: 01/05/31: Speedy Zero Two: Xilinx webpack and modelsim
31630: 01/06/01: Rick Filipkiewicz: Re: Xilinx webpack and modelsim
31658: 01/06/01: Speedy Zero Two: Re: Xilinx webpack and modelsim
31632: 01/05/31: Austin Franklin: Re: Xilinx webpack and modelsim
31640: 01/06/01: Allan Herriman: Re: Xilinx webpack and modelsim
31650: 01/06/01: Austin Franklin: Re: Xilinx webpack and modelsim
31677: 01/06/02: Allan Herriman: Re: Xilinx webpack and modelsim
31679: 01/06/02: Austin Franklin: Re: Xilinx webpack and modelsim
31701: 01/06/04: Allan Herriman: Re: Xilinx webpack and modelsim
31654: 01/06/01: Rick Filipkiewicz: Re: Xilinx webpack and modelsim

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