Predictable Design Optimization and Closure with Fusion Compiler Adaptive Scenario Compression BLOG Oct 23, 2025/5 min read BLOG Predictable Design Optimization and Closure with Fusion Compiler Adaptive Scenario Compression By Nahmsuk Oh, James Chuang Tags: Engineering Central, Design, Physical Implementation
What Is Local Layout Effect (LLE) and How Does It Impact Chip Design? BLOG Sep 11, 2025/3 min read BLOG What Is Local Layout Effect (LLE) and How Does It Impact Chip Design? By Chun-Soo Kim, Hoseong Kim Tags: Design, About Synopsys, Physical Implementation, 5nm and Below, Energy-Efficient SoCs, Signoff, Verification
How AI is Revolutionizing Analog and Digital Node Migrations BLOG Aug 14, 2025/5 min read BLOG How AI is Revolutionizing Analog and Digital Node Migrations By Sumit Vishwakarma Tags: AI & Machine Learning, Custom Implementation, Physical Verification, Design, About Synopsys, Manufacturing, AMS Simulation, Physical Implementation, Design Technology Co-Optimization, Signoff, Verification, Analog Design
Simplifying AI Chip Development: Arm and Synopsys Execs Discuss Chiplet, Subsystem, and IP Integration BLOG Aug 07, 2025/3 min read BLOG Simplifying AI Chip Development: Arm and Synopsys Execs Discuss Chiplet, Subsystem, and IP Integration By Frank Malloy Tags: Multi-Die, AI & Machine Learning, Design, About Synopsys, Physical Implementation, Silicon IP, Verification, Virtual Prototyping
Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud BLOG Apr 18, 2024/2 min read BLOG Cisco Accelerates Project Schedule by 66% Using Synopsys Cloud By Anuj Pant Tags: Customer Spotlight, Cloud, Design, About Synopsys, Physical Implementation, Signoff
Leveraging Early Power Network Analysis to Accelerate Chip Design BLOG Apr 16, 2024/4 min read BLOG Leveraging Early Power Network Analysis to Accelerate Chip Design By Rob van Blommestein Tags: Design, About Synopsys, Physical Implementation
CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow BLOG Mar 05, 2024/3 min read BLOG CalligoTech Enables Next-Gen Computing at Scale with Synopsys Digital Design Flow By Karan Shah, Irfan Shaikh Tags: Customer Spotlight, RTL Synthesis, AI & Machine Learning, Physical Verification, Test, Design, About Synopsys, Physical Implementation, Signoff, HPC, Data Center
Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads BLOG Jun 13, 2023/4 min read BLOG Synopsys and AMD Collaboration Achieves Significant Milestones for EDA Workloads By Andy Tai, Ramesh Narayanaswamy Tags: Multi-Die, Design, About Synopsys, Physical Implementation, Signoff, HPC, Data Center, Verification
Top-Level Interconnect Planning and Implementation using Synopsys IC Compiler II BLOG Apr 03, 2022/2 min read BLOG Top-Level Interconnect Planning and Implementation using Synopsys IC Compiler II By Jiangtao Meng Tags: Design, Physical Implementation
Getting Better Results Faster with the Singular RTL-to-GDSII Product BLOG Apr 09, 2020/7 min read BLOG Getting Better Results Faster with the Singular RTL-to-GDSII Product By Shekhar Kapoor, Mark Richards Tags: Design, Physical Implementation
Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution BLOG Nov 05, 2018/1 min read BLOG Introducing Fusion Compiler: A Unified Synthesis and Place and Route Solution By Shankar Krishnamoorthy Tags: Design, Physical Implementation