Synopsys is a leading provider of electronic design automation solutions and services.

Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs.

SoC Architecture Analysis and Optimization for Performance and Power

Synopsys Platform ArchitectTM is a SystemCTM standards-based performance and power analysis tool for early SoC architecture exploration and design. Using transaction-level simulation , it reduces design time by predicting and optimizing architecture KPIs. ​

Platform Architect helps optimize hardware-software partitioning, IP selection and configuration, interconnect and memory configuration, and power. ​

Today’s SoC complexity means spreadsheet-based architecture tools are inefficient and run a high risk of re-spins to meet power and performance targets, resulting in higher costs and TTM delay. With the largest library of architecture models, and fast capture of task and trace-based SW workloads, Platform Architect is the choice to shift-left your architecture design and deliver the right product on schedule.

In addition, Synopsys Platform Architect for Multi-Die Systems accounts for the interdependencies between multiple dies, or chiplets, within multi-die systems.

What's New

Event

Virtual Prototyping Day 2025

June 25, 2025

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Blog

Faster, More Collaborative SoC and Chiplet Architecture Exploration: Introducing Synopsys Platform Architect Development Kit (PADK)

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Webinar

Synopsys Collaboration Framework to Boost SoC/Chiplet Architecture Performance Analysis and Optimization

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Blog

Avoiding Multi-Die System Re-spins with New Early Architecture Exploration Technology

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Key Benefits

Features

  • Extensive Model Library: Access the largest collection of transaction-level performance models for comprehensive system simulation.
  • Rapid Workload Capture: Quickly capture and analyze task and trace-based software workloads for efficient evaluation.
  • Application-Specific Support: Benefit from tailored support for AI, automotive, and networking applications to meet specialized needs.
  • Power Analysis: Perform system-level power analysis using IEEE-1801 UPF power monitors for accurate energy assessment.
  • Intuitive Tradeoff Analysis: Easily analyze tradeoffs and key performance indicators (KPIs) for optimal design decisions.
  • Design Space Exploration: Swiftly sweep through design spaces and conduct sensitivity analysis to identify optimal configurations.
  • User-Friendly Interface: Leverage an easy-to-use UI for dynamic modeling, simulation, and analysis of SoC architecture designs.
  • Automated Task Execution: Utilize a command line interface for automating architecture development tasks and workflows.
  • Standards-Based Simulation: Simulate environments using IEEE-1666 SystemC standards for consistency and reliability.
  • Collaborative Access: Enable role-based access with the Platform Architect Development Kit for team-based simulation and analysis.

What Our Customers Are Saying

Related Architecture Exploration Products

Resources

Webinar

Maximize Performance and Efficiency of Multi-die Data Center Chip Designs with Arm CoreLink CMN-700 and Synopsys Platform Architect

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Blog

Customer Spotlight: Lightelligence Optimizes Optical SoC Design with Synopsys Platform Architect

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White Paper

Turbo-Charging Continuous Integration and Development Flows with Virtual Prototypes

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Video

Platform Architect Demonstration Running on ARC® NPX NPU Processor IP


Explore On-Demand Presentations from Our Annual Virtual Prototyping Day

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