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bperez77 / xilinx_axidma

Star 515

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.

fpga driver xilinx zedboard axi-dma linux-driver axi-vdma dma-driver xilinx-axi-dma xilinx-axi-vdma userspace-dma fpga-dma

Updated Jan 12, 2023
C

MeowLucian / SDR_Matlab_OFDM_802.11a

Star 187

📡 Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz

radio gui zynq packets hardware matlab xilinx sdr zedboard ofdm qpsk preamble ad9361 ieee80211a fmcomms3 fmcomms analog-device 80211 xilinx-zynq

Updated Apr 7, 2018
MATLAB

WangXuan95 / Zynq-Tutorial

Star 111

使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例

zynq vivado zedboard petalinux block-design soc-fpga zynq-7020

Updated Sep 19, 2024

eliaskousk / parallella-riscv

Star 103

RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards

zynq linux-kernel rocket-chip gsoc gsoc-2016 zedboard petalinux parallella risc-v rocket-core

Updated Nov 14, 2018
SystemVerilog

MeowLucian / SDR_Matlab_OFDM_802.11n

Star 103

📡 Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz

radio gui zynq hardware matlab xilinx sdr analog-devices zedboard ieee80211 ofdm qpsk preamble ad9361 fmcomms3 fmcomms 80211 mimo xilinx-zynq transmit-ofdm-signals

Updated Apr 2, 2018
MATLAB

Kenji-Ishimaru / polyphony

Star 90

3D graphics rendering system for FPGA, the project contains hardware rasterizer, software geometry engine, and application middleware.

fpga gpu verilog zedboard realtime-rendering 3d-graphics-rendering

Updated Oct 3, 2020
Verilog

DLX4 / zed_face

Star 62

zedboard上基于FPGA+ARM的人脸识别智能监控系统。关键词:linux,zedboard,arm,fpga,人脸检测,人脸识别。

c linux fpga face-recognition face-detection zedboard

Updated Jun 7, 2016
C

MeowLucian / SDR_FM_Radio

Star 47

📻 Using Software Designed Radio to transmit & receive FM signal

radio station zynq xilinx sdr simulink fm analog-devices zedboard demodulation modulation ad9361 fmcomms3 fmcomms simulink-model xilinx-zynq

Updated Apr 2, 2018
MATLAB

MeowLucian / SDR_Matlab_LTE

Star 45

📡 Using Software Designed Radio to transmit LTE downlink signals at 2.4 GHz

radio gui zynq hardware matlab xilinx sdr iio analog-devices zedboard software-defined-radio ofdm ad9361 fmcomms3 fmcomms xilinx-zynq 64qam

Updated Jul 3, 2019
MATLAB

MeowLucian / SDR_Matlab_OFDM_802.11a_16QAM

Star 45

📡 Using Software Designed Radio to transmit OFDM 16QAM signals at 5 GHz

radio gui zynq offline packets hardware matlab xilinx sdr analog-devices zedboard ieee80211 ofdm preamble ad9361 80211 16qam fmccomm3 fmccomms xilinx-zynq

Updated Apr 7, 2018
MATLAB

jiafulow / zedboard-guide

Sponsor

Star 44

zynq zedboard petalinux

Updated Feb 9, 2016

FloyedShen / mnist_hls

Star 37

Lenet for MNIST handwritten digit recognition using Vivado hls tool

zynq hls vivado zedboard fpga-accelerator vivado-hls mnist-hls

Updated Jul 22, 2020
Objective-C

Goshik92 / SHA256Hasher

Star 30

SHA-256 IP core for ZedBoard (Zynq SoC)

arm fpga zynq xilinx sha256 vivado systemverilog soc zedboard

Updated Jun 22, 2018
Verilog

lvgl / lv_port_xilinx_zedboard_vitis

Sponsor

Star 28

This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals

embedded usb tcp amd mouse freertos ntp xilinx vivado touchscreen zedboard vga digilent lvgl vitis

Updated Oct 12, 2023
C

delhatch / Zynq_UDP

Star 27

Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.

zynq udp zedboard

Updated Mar 24, 2021
C

sarthak268 / Embedded_Logic_and_Design

Sponsor

Star 25

This repository contains all labs done as a part of the Embedded Logic and Design course.

c arm vhdl embedded-systems verilog xilinx vivado logic-programming zedboard verilog-hdl xilinx-fpga logic-circuit xilinx-vivado embedded-c vhdl-code pmod xilinx-sdk verilog-programs verilog-project embedded-logic

Updated Jun 10, 2018

splAcharya / DigitalOscilloscope_Zynq7000Soc

Star 24

A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample data is displayed using a Graphical User Interface which mimics an Oscilloscope.

embedded-systems fpga-soc zedboard verilog-hdl xilinx-fpga xilinx-vivado zynq-7000 digital-oscilloscope