controlpath

Here are 5 public repositories matching this topic...

Ecolash / RISC-Processor

MiniMIPS | RISC Processor Design | CS39001 Course Project

pipeline processor assembler vivado hardware-designs assembly-language-programming computer-architecture verilog-hdl instruction-set-architecture mips-architecture control-unit fpga-programming controlpath computer-organization-and-design risc-architecture datapath-design

Updated Sep 14, 2025
Verilog

vipul43 / RISC_V_architecture_design

Star 1

designing RISC-V architecture using Verilog HDL in XILINX VIVADO PC SUITE

datapath verilog-hdl xilinx-vivado riscv64 controlpath risc-varchitecture hennessy-and-patterson

Updated Apr 23, 2020
Verilog

shahed22 / Architectural-Design-for-Bus-interface-connected-with-LFSR

Star 1

bus interface, integrating LFSR’s for streamlined register management. Enabled seamless master-peripheral communication, enhancing system efficiency. Orchestrated comprehensive design stages, yielding a versatile RTL architecture for diverse applications