Currently, learning Verilog. I found out there are few net types that can have multiple drivers and the value on the net will differ according to the type of net if wire
orwand
or wor
or others.
I grab this, but why on earth anyone would use that ?? What are real life use cases ?
Also I feel like wand
and maybe wor
are not synthesizeble, am I right ?
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\$\begingroup\$ Verilog is used for IC design, not just for FPGAs. There is a lot of parts of the language that are added to allow circuitry to be described. \$\endgroup\$Tom Carpenter– Tom Carpenter2018年04月07日 20:00:13 +00:00Commented Apr 7, 2018 at 20:00
2 Answers 2
It's true that you don't see this type of logic at the RTL level, but there are many technologies that use this at the device level, like open collector circuits, and emitter coupled logic. Also, these devices tend to consume more power, so they are only used where very high speed is required.
Verilog is not only used for FPGA design. It can also be used for ASIC design, or even for board-level design.
wand
nets can be implemented with open-collector logic.
wor
nets can be implemented with open-emitter logic (as in ECL designs).
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\$\begingroup\$ I would say in reverse, "wand is a net language construction to represent properties of open-collector logic", not the other way around. \$\endgroup\$Ale..chenski– Ale..chenski2018年04月07日 21:15:36 +00:00Commented Apr 7, 2018 at 21:15