Holst Stefan

論文

• ThorSim: Throughput-Oriented Timing Simulation of FinFET Digital Circuits

  Reimer J.D., Holst S., Sadeghi-Kohan S., Wunderlich H.J., Hellebrand S.

  2025 International Symposium of Electronics Design Automation Iseda 2025 502-507 2025年1月 査読有り
• Motion Classification by Utilizing Machine Learning for Acceleration Data

  Ishizu K., Honda T., Miyase K., Holst S., Ishikawa S., Sengupta R., Polian I.

  Digest of Technical Papers IEEE International Conference on Consumer Electronics 2025年1月 査読有り
• Highly Defect Detectable and SEU-Resilient Robust Scan-Test-Aware Latch Design

  Ma R., Holst S., Xu H., Wen X., Wang S., Li J., Yan A.

  IEEE Transactions on Very Large Scale Integration VLSI Systems 33(2) 449-461 2025年1月 査読有り
• GPU-Accelerated Estimation and Targeted Reduction of Peak IR-Drop during Scan Chain Shifting∗

  Shi S., Holst S., Wen X.

  IEICE Transactions on Information and Systems E106.D(10) 1694-1704 2023年10月 査読有り
• Mitigating Test-Induced Yield-Loss by IR-Drop-Aware X-Filling

  Shi S., Holst S., Wen X.

  Proceedings 2023 16th IEEE International Symposium on Embedded Multicore Many Core Systems on Chip Mcsoc 2023 501-507 2023年1月 査読有り
• Guardband Optimization for the Preconditioned Conjugate Gradient Algorithm

  Lylina N., Holst S., Jafarzadeh H., Kourfali A., Wunderlich H.J.

  Proceedings 53rd Annual IEEE IFIP International Conference on Dependable Systems and Networks Workshops Volume Dsn W 2023 195-198 2023年1月 査読有り
• Exploiting the Error Resilience of the Preconditioned Conjugate Gradient Method for Energy and Delay Optimization

  Lylina N., Holst S., Jafarzadeh H., Kourfali A., Wunderlich H.J.

  Proceedings 2023 IEEE 29th International Symposium on on Line Testing and Robust System Design Iolts 2023 2023年1月 査読有り
• Stock price movement prediction based on Stocktwits investor sentiment using FinBERT and ensemble SVM

  Liu J.X., Leu J.S., Holst S.

  PeerJ Computer Science 9 2023年1月 査読有り最終著者
• BiSTAHL: A Built-In Self-Testable Soft-Error-Hardened Scan-Cell

  Holst S., Ma R., Wen X., Yan A., Xu H.

  Proceedings of the European Test Workshop 2023-May 2023年1月 査読有り筆頭著者責任著者
• Power and Energy Safe Real-Time Multi-Core Task Scheduling

  Baita K., Chakrabarti A., Chatterjee B., Holst S., Wen X.

  Proceedings - 2022 35th International Conference on VLSI Design, VLSID 2022 - held concurrently with 2022 21st International Conference on Embedded Systems, ES 2022 16-21 2022年1月 査読有り
• On the Impact of Hardware Timing Errors on Stochastic Computing based Neural Networks

  Neugebauer F., Holst S., Polian I.

  Proceedings of the European Test Workshop 2022-May 2022年1月 査読有り
• Evaluation and Test of Production Defects in Hardened Latches

  Ma R., Holst S., Wen X., Yan A., Xu H.

  IEICE Transactions on Information and Systems E105D(5) 996-1009 2022年1月 査読有り
• GPU-Accelerated Timing Simulation of Systolic-Array-Based AI Accelerators

  Holst S., Bumun L., Wen X.

  Proceedings of the Asian Test Symposium 2021-November 127-132 2021年1月 査読有り筆頭著者
• On the efficacy of scan chain grouping for mitigating IR-drop-induced test data corruption

  Zhang Y., Holst S., Wen X., Miyase K., Kajihara S., Qian J.

  IEICE Transactions on Information and Systems E104D(6) 816-827 2021年1月 査読有り
• Logic Fault Diagnosis of Hidden Delay Defects

  Holst S., Kampmann M., Sprenger A., Reimer J.D., Hellebrand S., Wunderlich H.J., Wen X.

  Proceedings - International Test Conference 2020-November 2020年11月1日 査読有り筆頭著者
• Targeted partial-shift for mitigating shift switching activity hot-spots during scan test

  Holst S., Shi S., Wen X.

  Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2019-December 124-129 2019年12月 査読有り筆頭著者
• Variation-aware small delay fault diagnosis on compressed test responses

  Holst S., Schneider E., Kochte M.A., Wen X., Wunderlich H.J.

  Proceedings - International Test Conference 2019-November 2019年11月 査読有り筆頭著者
• A fault-tolerant MPSoC for CubeSats

  Fuchs C.M., Chou P., Wen X., Murillo N.M., Furano G., Holst S., Tavoularis A., Lu S.K., Plaat A., Marinis K.

  2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019 2019年10月 査読有り
• STAHL: A novel scan-test-aware hardened latch design

  Ma R, Holst S, Wen X, Yan A, Xu H

  Proceedings of the European Test Symposium 2019-May 2019年5月 査読有り
• Clock-Skew-Aware Scan Chain Grouping for Mitigating Shift Timing Failures in Low-Power Scan Testing

  Zhang Y., Wen X., Holst S., Miyase K., Kajihara S., Wunderlich H., Qian J.

  Proceedings of the Asian Test Symposium 2018-October 149-154 2018年12月6日 査読有り