basys3

Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented with SW in the bare-metal 'C' they, together, make for this classic game. Except that it's now, in the standard BiH tradition, with a twist of our own.

open-source gamedev fpga rtl xilinx soc verilog-hdl yosys basys3 tetris-game nextpnr xc7a35t

Updated Feb 23, 2025
Verilog

Handwritten-Digit-Recognition-Painter

j3soon / Handwritten-Digit-Recognition-Painter

Star 24

A handwritten digit recognition painter implementation on Basys 3 Artix-7 FPGA using Verilog.

machine-learning embedded fpga deep-learning neural-network artificial-intelligence embedded-systems verilog digit-recognition handwritten-digit-recognition basys3 painter artix-7

Updated Oct 29, 2023
VHDL

imshaaz21 / Spiking-Neural-Network-on-FPGA

Star 22

CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL

fpga vhdl spiking-neural-networks basys3 snn neural-network-on-fpga

Updated Dec 29, 2023
C

martinKindall / mips_cpu

Star 20

Single Cycle 32 bit MIPS

fpga mips systemverilog basys3 mips-cpu single-cycle basys3-fpga single-cycle-processor

Updated Dec 24, 2022
SystemVerilog

tongplw / Undertale-Verilog

Star 15

👻 Simple Undertale-like game on Basys3 FPGA written in Verilog

fpga verilog uart fpga-game vga undertale basys3 fpga-board verilog-project basys3-fpga

Updated Jul 3, 2020
Verilog

bilalkabas / Basys3-VHDL-Basics

Star 13

This repository has basic examples in VHDL using Basys3 board.

vivado basys3 vhdl-examples fpga-programming

Updated Aug 15, 2020
VHDL

soundjuice / Basys3-Pulse-Generator

Star 10

Pulse generator on Basys 3 FPGA board

fpga vhdl basys3 pulse-generator

Updated Aug 14, 2019
VHDL

Maneesh3 / Morse_Code_Encoder_Basys3

Star 8

Morse Code Encoder on Basys 3 [Artix-7, part: xc7a35tcpg236-1]

morse basys3

Updated Feb 15, 2019
Verilog

raleighlittles / Applied_Digital_Logic_Exercises_Using_FPGAs

Sponsor

Star 8

Selected projects from "Applied Digital Logic Exercises using FPGAs", by Kurt Wick.

fpga verilog vivado hdl basys3 artix-7 microblaze-mcs applied-digital-logic-exercises

Updated Jan 12, 2022
Verilog

romybompart / Basys3-clock-alarm-with-buzzer

Star 8

Digital clock implemented in vhdl for the Basys 3 Board from Digilent.

clock vhd buzzer digit digital-clock basys3 digilent vhdl-code basys3-fpga basys3-clock-alarm buzzer-termination

Updated Dec 14, 2020
VHDL

CankutBoraTuncer / Bilkent-EEE102-Labs

Star 8

This is the repo is created for helping fellow Bilkenteers to pass their EEE102 Digital Electronics course. You can find Lab answers from Lab 1 to Final Project! Have fun!

vhdl labs bilkent basys3 eee102 digitalelectronics

Updated Jun 4, 2022

antimattercorrade / Color_Detection_BASYS3

Star 7

Color Detection using Basys3 FPGA

fpga vhdl verilog basys3 color-detection

Updated Nov 17, 2019
VHDL

DeanDev94 / FPGA-Audio-Effects-System

Star 7

FPGA Audio Effect System project for Electronic Engineering course. This project spanned two semesters and was my final year project

fpga verilog xilinx vivado audio-processing basys3 audio-effects cork-institute-of-technology

Updated Oct 11, 2020
Verilog

ti-uni-bielefeld / logisim-evolution-basys3

Star 7

A set of scripts, manuals and patches to make synthesizing and downloading circuits from Logisim Evolution onto the Basys3 FPGA board on Linux easier and more seamless.

fpga vhdl university-project logisim basys3 fpga-board basys3-fpga logisim-evolution