How AI is Supercharging Chip Design Workflows

• Assistive AI: Improving chip design workflows
• Agentic AI: The next wave of EDA automation and optimization
• AI’s impact on the engineering workforce
• A complex balancing act

This article originally appeared in Electronic Design

Chip design has historically been a long and painstaking process, with many iterations and re-spins that are both tedious and inefficient. Not only do engineers struggle with cumbersome design flows and manual — often repetitive — processes, but it can take years to acquire essential domain expertise. It’s been estimated that early engineers spend roughly 40% of their time looking for information, consulting outdated documentation, or asking peers and superiors for guidance.

Manual interventions and fact-finding missions leave less time for creative thinking and problem solving. They slow down the design process. And they hinder innovation.

But these dynamics are changing with the emergence of electronic design automation (EDA) tools that are infused with artificial intelligence (AI).

AI has been — and continues to be — an EDA game-changer. The advent of large language models (LLMs) and AI-powered copilots are completely reshaping the chip design landscape, providing engineers with an unprecedented level of assistance.

Today’s assistive AI tools can quickly process vast amounts of technical documentation, generate optimized code, and even offer real-time debug suggestions. Highly advanced EDA tools like Synopsys.ai are even leveraging generative AI capabilities to automate complex, multifaceted tasks. Early adopters are using these technologies to streamline processes related to:

• Analog design, test, and verification
• RTL and netlist generation
• Timing analysis
• Design rule checking

The benefit is clear: Engineers are freed from the mundane aspects of chip design, allowing them to focus on true innovation and higher-level problem solving — the fun stuff!

And yet, despite these early advances, we have only scratched the surface of what’s possible with AI. And we are already working on new innovations.

Today’s tools provide AI assistance for well-defined tasks, but the potential for additional automation and orchestration remains vast. As the industry continues to embrace AI, the next generation of EDA tools will offer deeper insights, predictive analytics, and even self-optimization capabilities. In doing so, they will completely re-engineer the entire chip design workflow.

So, what’s next? A new era of truly automated decision-making and orchestration beckons in the form of agentic AI. In the future, autonomous systems will be capable of making design decisions with minimal human intervention. Unlike current AI tools, which require human inputs and predefined parameters, agentic AI has the potential to act as an independent and self-directed design partner. Imagine a system that not only automates repetitive tasks but also proactively identifies possible design improvements, foresees potential bottlenecks, and adjusts the workflow accordingly.

Early AI agents have remained relatively specialized and discrete, built for specific use cases and isolated within certain applications and datasets. But that’s changing.

During a keynote presentation earlier this year, Synopsys CEO Sassine Ghazi outlined his vision for AgentEngineerTM technologies, signifying the next evolution of this revolutionary technology. He said we will start to see workflow automation steadily increasing, starting with actions and orchestration, followed by learning and eventually fully autonomous decision making. This progression will take place over the next few years with multi-agent systems replacing traditional manual workflows.

The transition to AgentEngineerTM technologies will allow design teams to completely Re-engineer EngineeringTM and take advantage of the latest AI tools and innovations. This journey will have five levels of automation:

• Level 1 is where AI assistants and copilots are already creating scripts and design files autonomously using LLMs. This is where we are today.
• Level 2 will introduce agents that can act on specific areas of a workflow and trained with extensive expertise in those areas.
• Level 3 will enable multi-agent capabilities and orchestration, which will involve the coordination of many agents and agent types across the workflow.
• Level 4 involves advanced learning capabilities, allowing the agentic solutions to assess the quality of results and refine flow steps, settings, and even input files to improve results.
• Level 5 is where the term "autopilot" will really start to become applicable, offering high-level decision-making, fully autonomous reasoning, and complex planning capabilities. This is where the human engineer will simply enter the product specification, and an entire subsystem will be created automatically.

With workforce gaps that continue to grow, many in the semiconductor industry are eagerly anticipating these capabilities. NVIDIA CEO Jensen Huang recently said, "I look forward to renting or leasing a million AI chip designer agents from Synopsys to design a new chip."

As AI technologies rapidly transform chip design, their impact on the engineering workforce is equally profound. AI reduces the burden of repetitive, tedious tasks, freeing engineers to focus on higher-level work that is more strategic and creative. This shift not only enhances productivity but also job satisfaction, as engineers can spend more time on activities that drive innovation and value creation.

For businesses, it will free up much needed engineering capacity. With AI tools taking on more tasks, human engineers can work on additional projects or focus on activities that accelerate time to market.

The increasing use of AI has also raised flags of uncertainty within the silicon engineering community. With AI-driven tools orchestrating more of the chip design process, some have expressed concern about traditional roles and responsibilities and the prospect of reskilling or reallocating talent. Questions have also been raised about accountability and who should be responsible for AI training and decision-making.

These are legitimate questions and complex issues that must be addressed to maintain user confidence in — and maximize the transformative potential of — tomorrow’s AI tools.

Ultimately, the shift toward AI-driven chip design is a complex balancing act. New technology can dramatically improve productivity and innovation, but it also requires careful consideration. We need to ensure tomorrow’s tools augment human capabilities rather than replace them.

Fortunately, current progress and outlook are overwhelmingly positive.

The journey from manual, inefficient processes to an AI-enhanced future has begun. The integration and use of AI tools is already delivering noticeable results. And with agentic AI on the horizon, the semiconductor industry is about to enter a new era of automation and innovation.

With a comprehensive suite of pioneering, AI-enabled EDA tools — and more on the way — we at Synopsys are actively working to make these visions a reality.