Skip to main content
Stack Overflow
  1. About
  3. For Teams
Filter by
Sorted by
Tagged with
0 votes
0 answers
71 views

I'm buiding a single-core rocket chip, which use an Gemmini interface to do systollic array, and I use board Arty-Z7 to run demo on FPGA. My problem here is I don't know how to choose a suitable ...
NauQ's user avatar
  • 1
0 votes
0 answers
42 views

I am trying to configure an MMIO Peripheral (= MMIO Accelerator, 11page) consisting of a 4x4 NoC in Chipyard. In this process, I would like to insert a SystemVerilog-based NoC as a BlackBox. However, ...
2 votes
0 answers
95 views

I am trying to write data starting at a specific address (0x88000000) of the memory (simulated DRAM size is 256 MiB), once all data is written, the DMA unit is programmed using the MMIO registers. The ...
0 votes
0 answers
57 views

I am trying to add a MMIO device to rocket-chip in chipyard and I want to use Tilelink interface. This MMIO device is intended to be a slave and the rocket-core as the master. For this, I created a ...
0 votes
1 answer
110 views

While I am benchmarking my Rocketcore CPU, I encountered failed Coremark benchmarking. After some debug, I reduce the issue scope to unsuccessful global initialization of 0 value. In Coremark, it will ...
0 votes
1 answer
140 views

I tried to set up the rocket-chip generator environment. I cloned the git repository and updated the submodules as follows: $ git clone https://github.com/ucb-bar/rocket-chip.git $ cd rocket-chip $ ...
1 vote
0 answers
137 views

I've setup Chisel 5.0.0 and firtool as I explained in this other question. I also installed successfully mill and rocket-tools as instructed here and here. This prepared the stage for getting the ...
1 vote
1 answer
193 views

Here is the bug report: macros.compile scala.reflect.internal.FatalError: bad constant pool index: 0 at pos: 48461 while compiling: <no file> during phase: globalPhase=<no ...
0 votes
1 answer
221 views

I have 4 Rocket RISC-V cores and each are connected to 4 identical accelerators. What I am trying to do is to use multithreading to run all or some of the accelerators at the same time and compare the ...
2 votes
1 answer
688 views

I am a beginner working with rocket chip generator for my project but I am not able to generate the verilog file for it and facing this error. I am using an apple M1 chip macOS. I started with cloning ...
0 votes
1 answer
229 views

I'm following the instructions in rocket-chip v1.6 to install and run rocket-chip. As mentioned there, I need to install rocket-tools first (it's not mentioned what version of rocket-tools is ...
0 votes
1 answer
547 views

Discussed in https://github.com/chipsalliance/rocket-chip/discussions/3492 Originally posted by AnuragMalwee September 20, 2023 Hi, I am building the rocket-chip project for the first time, and never ...
0 votes
1 answer
167 views

I have installed rocket-chip and it needs chisel to compile i have also downloaded chisel , but when i run sbt test all the tests fail, am i doing something wrong . is there an alternative for sbt ...
0 votes
1 answer
109 views

I am trying to create a simple module with tilelink client connected to modules output. How to do it? Have been trying to figure it out for 20 hours at this, I am completly lost. I am trying the ...
armleo's user avatar
  • 1
0 votes
1 answer
57 views

I am simulating baremetal executables on Rocket chip with verilator. When I use a large array like float a[3][224][224] the simulation in verilator will not work successfully. Here is my main.cpp: int ...

15 30 50 per page
1
2 3 4 5
...
9

AltStyle によって変換されたページ (->オリジナル) /