Questions tagged [code-design]
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2
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Structure Identification in HDL codes
I wanted to automatically Identify some structures in HDL code (Verilog/VHDL), let say an adder. I need to automatically detect how many adders in the design. I am not sure from where to start, should ...
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4
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How to design schematic with infinite life expectancy [closed]
Well I know there is nothing infinite and every device can break on some circumstances.
But still, how to design electronic devices that to be able to function continuously for very long time.
Lets ...
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2
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verilog state machine - state won't update
So I'm trying to simulate a state machine with outputs s and v and a state. for some reason our s and v values are updating but the state refuses to change,
any help would be awesome
...
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4
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Can binary code such as an embedded OS or user application code be stored using silicon physical gates
Hello as the questions describes I'd like to know whether it's possible to do this ? Can binary executable code which is executed by a processor core possibly be stored using physical silicon gates ? ...
11
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Do open source libraries exist for VHDL the way they do for C++ or python?
When I'm approaching a problem in C++ or python, there are many libraries that exist which do the heavy lifting of my code. I'm thinking about GNU GSL, BOOST, or FFTW for C++, and NumPy or SciPy for ...
2
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2
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Verilog: Change a Certain Delay According to the Current Output
For Verilog 2005, when writing the test bench, is it possible to create a lookup table of delay values, and then assign a certain value in it to be the delay of some procedural block?
For example:
<...
user avatar
user61665
0
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2
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204
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Avoiding multiple defines by using side effect of PIC banking
This is more a question of style than anything else and might strike some as a bad thing to do. If I have a serial port pin on RC4, say, I can make some defines to help out:
...
2
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1
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Synchronizing multiplier with adder to form mac
I have designed an 8-bit multiplier in Verilog which takes a maximum of 8 clock cycles to give the product. I have also coded a 16 bit adder based on combinational logic. I now want to integrate the ...
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3
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How to determine an expression that detects underflow?
This is a part of my computer science assignment:
When adding two unsigned binary integers, an overflow can easily be verified by observing
the carry out. Specifically, an overflow occurred if and only ...
1
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1
answer
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MSP430 Coding, Can I Place an Interrupt Vector Inside a Function?
As the title said, I am trying to see if an Interrupt Vector can be embedded inside a function? I am using IAR, but gcc or ccs would work too. I don't see it done in any code online. Example:
...
11
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2
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Difference between If-else and Case statement in VHDL
I want to understand how different constructs in VHDL code are synthesized in RTL.
Can anyone tell me the difference between If-Else construct and
Case statement constructs of a process in VHDL in ...
8
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2
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Flow diagrams for embedded applications
I have embedded application which uses interrupts and dma. The main loop only sends data to PC.
How to design flow diagram of program? How to show interrupts and dma working on flow diagram?
I've ...
1
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3
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Can someone help me complete this Verilog code for this sequential circuit?
I'm still pretty new to Verilog and all and could use some help completing/fixing my code for this problem. I have made the state diagram, state table/assignment, minimized the equation, and even have ...
2
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3
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How to transmit ASCII over RS-232?
i want to display the voltage level through a Potentiometer over the serial comm line(RS-232) in pure ASCII. I am trying to do this using MC9S08AW60 on the Board-DEMO9S08AW60E.
So, if the ...
25
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2
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C coding design - function pointers?
I have a PIC18F46K22 and program it with the XC8 compiler. In the end, I'll have a system like a pc with stdin and stdout. So in ...
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user17592