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Hello Stack exchange community

I was wondering which modification should I have to make in order to enable single-cycle MIPS processor to run a jal(jump and link) command?

My most pressing confusion relating to this command is that I can't figure out a way to derive the address of the next instruction and how to connect it to PC counter.

I would really appreciate if anyone can provide me with some insights concerning this issue.

Single-Cycle MIPS processor

asked Dec 3, 2020 at 21:03
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    \$\begingroup\$ This smells like unattempted homework... if it's not, you'll have no difficulty to explain the exact technology in which you plan to implement this. \$\endgroup\$ Commented Dec 3, 2020 at 21:21

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Without giving the solution I can help you to figure out how you can get it.

The instruction jal (jump and link) is an unconditional branch where we consider a specified address (label) in the instruction code to be applied to PC.

What you must do:

  1. jal must be considered in the decoder in order to get a signal telling that jal is to be executed. You have something to add here:

enter image description here

  1. The multiplexer applied to PC has initially two inputs. First input for non-branching instructions: PC+4 and second input in the case of a "branch if equal": 16-bit offset in the instruction code, we extend the sign ( to have a 32-bit address offset), we multiply it by 4 (<<2) to get it byte-addressed and we add it to PC+4. The multiplexer now must consider an additional input composed from a part of the instruction (the label coded in the instruction), higher 4 bits of PC + 4, and alignment consideration to 32-bit. You have to add something here:

enter image description here

  1. Jal must also write PC+4 to the register 31ドル ($ra) which holds the return address if applied. So, you have also to add something here:

enter image description here

answered Dec 4, 2020 at 7:05
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  • \$\begingroup\$ I guess, now I have an idea how to implement this, thanks for the insights Paul. \$\endgroup\$ Commented Dec 4, 2020 at 11:18
  • \$\begingroup\$ Is it any other necessary modifications needed to make in order to implement instructions such as "addi"," ori", "andi" and "slti"? I reckon that the current one should would work fine. \$\endgroup\$ Commented Dec 4, 2020 at 12:01
  • \$\begingroup\$ These instructions need to use ALU and does not directly concern PC so it is another problem. \$\endgroup\$ Commented Dec 4, 2020 at 12:03
  • \$\begingroup\$ by the way ALUOp is already implemented and executes the mentioned instructions \$\endgroup\$ Commented Dec 4, 2020 at 12:15
  • \$\begingroup\$ Yes, that's what I thought. Thanks for your guidance! \$\endgroup\$ Commented Dec 4, 2020 at 12:39

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