Looking for a program that can simulate a Verilog HDL file

Question

I was wondering whether a program has been made that can simulate the end product of a Verilog HDL design file.

To give some information I am using Quartus 2 (the design file is a verilog HDL file) and compiling it, (and then I would download the design to an Altera DE2 board (Cyclone II). I am asking whether a program exists that would allow me to do this without the physical DE2 board).

For example, a Verilog HDL file that takes switches as inputs and outputs are seven-segment displays.

I hope I have used the correct terminology as I am new to coding in Verilog.

Any suggestions welcome :)

Answer 1

http://en.wikipedia.org/wiki/List_of_Verilog_simulators

At the low-cost end:

• iverilog is a well-thought-of open-source simulator.
• Xilinx have their own simulator - ISIM
• Altera provide a simple version of Modelsim

Answer 2

Yes, it's called a logic simulator. And there's a "starter" edition of Modelsim, a popular logic simulator, included in your copy of Altera's Quartus II software.