• # une solution

    Posté par . En réponse au message intel intrinsics. Évalué à 2. Dernière modification le 22 novembre 2014 à 20:09.

    Bien, je pense pouvoir faire affaire avec :

    // macro pompée sur projet Simd (http://sourceforge.net/projects/simd/)
#define SIMD_CHAR_AS_LONGLONG(a) (((long long)a) & 0xFF)
#define SIMD_LL_SETR_EPI8(a, b, c, d, e, f, g, h) \
 SIMD_CHAR_AS_LONGLONG(a) | (SIMD_CHAR_AS_LONGLONG(b) << 8) | \
 (SIMD_CHAR_AS_LONGLONG(c) << 16) | (SIMD_CHAR_AS_LONGLONG(d) << 24) | \
 (SIMD_CHAR_AS_LONGLONG(e) << 32) | (SIMD_CHAR_AS_LONGLONG(f) << 40) | \
 (SIMD_CHAR_AS_LONGLONG(g) << 48) | (SIMD_CHAR_AS_LONGLONG(h) << 56)
#define SIMD_MM_SETR_EPI8(a0, a1, a2, a3, a4, a5, a6, a7, a8, a9, aa, ab, ac, ad, ae, af) \
 {SIMD_LL_SETR_EPI8(a0, a1, a2, a3, a4, a5, a6, a7), SIMD_LL_SETR_EPI8(a8, a9, aa, ab, ac, ad, ae, af)}
// nos 2 masques
const __m128i FIRST_PACKET = SIMD_MM_SETR_EPI8(0xF,0xD,0xB,0x9,0x7,0x5,0x3,0x1,-1,-1,-1,-1,-1,-1,-1,-1);
const __m128i SECOND_PACKET = SIMD_MM_SETR_EPI8(-1,-1,-1,-1,-1,-1,-1,-1,0xF,0xD,0xB,0x9,0x7,0x5,0x3,0x1);
// les registre à entrelacer
__m128i k1 = _mm_set_epi8(0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15);
__m128i k2 = _mm_set_epi8(16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31);
// distribution des octets
__m128i res1 = _mm_shuffle_epi8 (k1, FIRST_PACKET);
__m128i res2 = _mm_shuffle_epi8 (k2, SECOND_PACKET);
// le résultat escompté
__m128i res = res1 + res2;
out: 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30