1a What is the output of a three input OR gate when two inputs are HIGH and the third input is LOW? b) What is the output of a NOT gate when the input is LOW?

6. How many different sets of input conditions will produce a LOW output from a four-input AND gate? Explain why.

(b) Using a synchronous binary counter as shown in Figure Q2(b), design and draw a counter to generate the following repeating sequences 2 to 14 repeatedly for a free running clock. If the circuit happens to enter any of the states 15 or 0 or 1, what are the next states of your circuit? A A Syn. Binary Counter Q3 Q2 Q1 Qo →Asyn. clear Syn. load CLK D3 D2 D1 Do ↑↑↑↑

1. Use multiplexer IC's to design a combinational circuit with 3 inputs x,y, and z and three outputs A,B, and C. When the binary input is 0,1,2 or 3 the binary output is two greater than the input. When the binary input is 4,5,6, or 7 the output is three less than the input.

Needs Complete solution with 100 % accuracy.

2a) What is the output of a two input AND gate when both inputs are LOW? 2b) What is the output of a two input AND gate when both inputs are HIGH? 2c) What is the output of a two input OR gate when both inputs are LOW? 2a What is the output of a three input OR gate when two inputs are HIGH and the third input is LOW? 2bWhat is the output of a NOT gate when the input is LOW?

What is the output of an AND gate if the inputs are 1 and 0?

A NAND Gate a.Goes HIGH only when all inputs are HIGH b.Goes HIGH if one or the other inputs are HIGH but not both c.Goes HIGH if any input is HIGH d.Goes HIGH only when all inputs are LOW

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For the device shown below: If the enable signal /EN (ENbar) is HIGH or (inactive) D So S1. EN O ALL outputs will be HIGH Except /YO (YObar) All the outputs will be HIGH All output will be HIGH except/Y3 (Y3bar) All the outputs will be LOW

The figure below shows the input waveforms for a NOR latch. Draw the corresponding output waveforms. S A Q

Use the schematic for our board to select the input signals on the I/O Memory selection hardware that are used to generate the ROMRD signal on our board WR ROMSEL O READY O WR 10/M O RD O O O O O

Question #1 Which logic function does the circuit implement? VHigh Kt VA Vo VB Vc VLOW (i) (A and B) and C (ii) (A or B) and C (iii) A and (B or C) (iv) (A and B) or C (v) A or (B and C) (vi) (A or B) or C