How many different sets of input conditions will produce a LOW output from a four-input AND gate? Explain why.

A single stage amplifoer has a single stage of 60. The collector load of 500 ohms and the input impedance is 1kilo ohms. Calculate the overall gain when two such stages are cascaded through R-C coupling.

2, 2.3, 2 1. Design 3 bit Analog to digital converter. 2. Consider a platinum resistance temperature sensor, which has a resistance at 0°C of 100 ohms and forms one arm of a Wheatstone bridge. The bridge is balanced, at this temperature, with each of the other arms also being 100 ohms. If the temperature coefficient of resistance of platinum is 0.0039/K, what will be the output voltage from the bridge per degree change in temperature if the load across the output can be assumed infinite? The supply voltage, with negligible internal resistance, is 6.0v. The variation of the resistance of the platinum with temperature can be represented by Rt = R0(1+ at) Where Rt is the resistance at t (°C), R0 the resistance at 0°C and a the Temperature coefficient of resistance. 3. Simplify the Boolean function below and draw the Combinatorial logic of Simplified Function. (a + b)(a + b') 4. Implement a logic function and circuit diagram of truth table below. ABC F A 5. B 000 001 010 011 100 101 110...

(a) ii please in photo

2. 3. 5. Using the data when the gate voltage is 0, explain how you could use your JFET as a two-terminal current source that gives a current of Ipss. (a) Does the experimental data indicate that the transconductance is a constant at all points? (b) From your experimental data, what evidence indicates that a JFET is a nonlinear device? Why should a JFET be operated with only reverse bias on the gate source?