Chilton::ACL::Atlas Words

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Atlas building □しろいしかく Atlas computer □しろいしかく Sigma 2 Front-end □しろいしかく SC4020 microfilm recorder □しろいしかく PDP15 interactive graphics system □しろいしかく ICL 1906A computer □しろいしかく FR80 microfilm recorder □しろいしかく Manchester Atlas 50th anniversary (2012) □しろいしかく Chilton Atlas 50th anniversary (2014)

Further reading □しろいしかく Overview □しろいしかく About Ferranti □しろいしかく Brochure □しろいしかく Architecture □しろいしかく Architecture □しろいしかく 1-Level Storage □しろいしかく Words □しろいしかく Instructions □しろいしかく Order Code □しろいしかく Animated □しろいしかく Hardware □しろいしかく Fixed Store □しろいしかく Supervisor □しろいしかく Overview □しろいしかく Scheduler □しろいしかく Core Memory □しろいしかく Atlas Card □しろいしかく Atlas Console □しろいしかく Console Details □しろいしかく Chilton □しろいしかく Chilton Atlas □しろいしかく Downstairs □しろいしかく Manchester □しろいしかく Manchester Atlas □しろいしかく London □しろいしかく London Atlas □しろいしかく London Software □しろいしかく Atlas II □しろいしかく Atlas 2 Brochure □しろいしかく Titan Autocode □しろいしかく Cambridge Atlas □しろいしかく Closure □しろいしかく Atlas Closure

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⟶ ACL ⟶ Technology ⟶ ATLAS

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Applications Associates Literature Society Technology Software revisited

Further reading ⇓

□しろいしかく Overview □しろいしかく About Ferranti □しろいしかく Brochure
Architecture
□しろいしかく Architecture □しろいしかく 1-Level Storage □しろいしかく Words □しろいしかく Instructions □しろいしかく Order Code □しろいしかく Animated
Hardware
□しろいしかく Fixed Store □しろいしかく Supervisor □しろいしかく Overview □しろいしかく Scheduler □しろいしかく Core Memory □しろいしかく Atlas Card □しろいしかく Atlas Console □しろいしかく Console Details
Chilton
□しろいしかく Chilton Atlas □しろいしかく Downstairs
Manchester
□しろいしかく Manchester Atlas
London
□しろいしかく London Atlas □しろいしかく London Software
Atlas II
□しろいしかく Atlas 2 Brochure □しろいしかく Titan Autocode □しろいしかく Cambridge Atlas
Closure
□しろいしかく Atlas Closure

Atlas Words

A single Atlas word can be used to represent any of the following:

A 48-bit floating or fixed point number, with the 8 most-significant bits representing the exponent and the other 40 the mantissa.
Two 24-bit half-word numbers. These are taken usually as 21-bit signed integers in digits 0-20, with an octal fraction in digits 21-23.
Eight 6-bit characters.
An instruction, specifying a function F (most-significant 10 bits), two index registers Ba and Bm (7 bits each) and an address N (least-significant 24 bits).

Addresses

The 23-bit main store address consists of

The bits 12-20 define the address of an instruction within a 512-word page while the block address uniquely defines the address within the 1-level storage system. Blocks are moved from drum to store as required under the control of the Supervisor.

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