[SPARC T4-4 Chassis Image, Courtesy Oracle]

Oracle SPARC T4-4 - USB Boot & Install

Abstract

UNIX Systems Manufacturers originated their markets as workstations, during a time when they used 32 bit systems and the rest of the PC market was concentrating on 8 and 16 bit systems, and some CPU vendors like Intel use segmentation to keep their 16 bit software alive while struggling to move to 32 bit architectures. Some of the original servers were stacked workstations on a rack in a cabinet. The former high-powered video cards were merely ignored, as remote management needed command line interfaces. Engineering quickly determined that console access needed to be built into a new class of systems: rack mounted servers. These early servers offered boot functionality from Network and Disk. One such boot capability was from USB Disk.This capability was later carried onto other chassis that Oracle would manufacture, such as the SPARC T4-4.

Creating a USB Boot Stick from Solaris

The USB port can be used to create a Solaris 11.4 USB Boot Stick from Solaris, after inserting a SanDisk USB stick into the front port next to the DVD Drive:

T5120/root# echo | format -e | grep -i SanDisk
4. c7t0d0 <SanDisk'-Cruzer Fit-1.00 cyl 1945 alt 0 hd 255 sec 63>
5. c8t0d0 <SanDisk'-Cruzer Fit-1.00 cyl 1945 alt 0 hd 255 sec 63>

T5120/root# ls -al *usb
-rw-r--r-- 1 dh127087 staff 1217341440 May 3 19:38 sol-11_4-text-sparc.usb

T5120/root# time dd bs=16k if=sol-11_4-text-sparc.usb of=/dev/rdsk/c7t0d0s2
74300+1 records in
74300+1 records out

real 8m57.25s
user 0m0.47s
sys 0m13.99s

T5120/root# echo "par\nprint\n" | format -e c7t0d0 | tail -14 | nawk '$NF!="0" && !/partition/'
Total disk cylinders available: 148 + 0 (reserved cylinders)

Part Tag Flag Cylinders Size Blocks
0 unassigned wm 0 - 147 1.13GB (148/0/0) 2377620
2 unassigned wm 0 - 147 1.13GB (148/0/0) 2377620

T5120/root#

This USB stick can now be tested from, from OpenBoot Firmware

Oracle SPARC T4-4

The Oracle SPARC T4-4 is a server with a 4th generation OpenSPARC processor. The SPARC T4 processor was manufactured to the same process size as the SPARC T3 CPU processor, but the core was upgraded, so equivalent throughput could be reached with half as many cores, at the same processor speed. The T4-4 Chassis comes with a Lights Out Management (LOM) capability referred to as Integrated Lights Out Management (ILOM.) Most remote systems management work can be done from the LOM. The system, when looking at the front of the chassis: the T5120 has 2x USB ports next to the DVD drive on the right and 2x USB ports located in the back left corner.

Attaching to the ILOM

The ILOM can be attached to via TCP/IP, if previously configured, or over a serial port.

T5120/user$ ssh root@sun1234-ilom
Password:

Oracle(R) Integrated Lights Out Manager
Version 3.2.6.8 r128095
Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
Hostname: ORACLESP-1207BDY075

->

Insert USB Boot

The USB boot flash stick should be inserted into a powered down chassis, to boot from firmware.

-> show /system power_state actual_power_consumption

/System
Properties:
power_state = Off
actual_power_consumption = 37 watts

Power Up Chassis

After the USB boot stick is inserted, the chassis should be powered up from the ILOM.

-> start /SYS
Are you sure you want to start /SYS (y/n)? y
Starting /SYS

After the chassis is powered on, once the power usage increases, attach to the console

-> show /system power_state actual_power_consumption

/System
Properties:
power_state = On
actual_power_consumption = 1384 watts


-> start /SP/console
Are you sure you want to start /SP/console (y/n)? y

Serial console started. To stop, type #.

{0} ok

Note: If the chassis was recently started, the ability to access a prompt does not really occur until after the actual power consumption rises to an expected level.
Note: if the "ok" prompt does not appear, press [RETURN] or [ENTER] key

Select USB Port

When a SanDisk USB Flash Sticks are plugged into the USB ports located to the right of the DVD drive, they can be seen at the OpenFirmware prompt, and can be selected into a copy-paste buffer, for easy use.

{0} ok show-disks
a) /reboot-memory@0
b) /pci@700/pci@1/pci@0/pci@0/LSI,sas@0/disk
c) /pci@500/pci@1/pci@0/pci@1/pci@0/pci@3/SUNW,emlxs@0,1/fp@0,0/disk
d) /pci@500/pci@1/pci@0/pci@1/pci@0/pci@3/SUNW,emlxs@0/fp@0,0/disk
e) /pci@400/pci@2/pci@0/pci@1/pci@0/pci@3/SUNW,emlxs@0,1/fp@0,0/disk
f) /pci@400/pci@2/pci@0/pci@1/pci@0/pci@3/SUNW,emlxs@0/fp@0,0/disk
g) /pci@400/pci@1/pci@0/pci@8/pci@0/usb@0,2/hub@2/hub@3/storage@2/disk
h) /pci@400/pci@1/pci@0/pci@8/pci@0/usb@0,2/hub@2/storage@2/disk
i) /pci@400/pci@1/pci@0/pci@0/LSI,sas@0/disk
j) /iscsi-hba/disk
m) MORE SELECTIONS
q) NO SELECTION
Enter Selection, q to quit: h
/pci@400/pci@1/pci@0/pci@8/pci@0/usb@0,2/hub@2/storage@2/disk has been selected.
Type ^Y ( Control-Y ) to insert it in the command line.
e.g. ok nvalias mydev ^Y
for creating devalias mydev for /pci@400/pci@1/pci@0/pci@8/pci@0/usb@0,2/hub@2/storage@2/disk
{0} ok

Note: the USB stick in position "h" (this lettered position may change as new USB sticks are plugged or unplugged) has it's device name copied into a "copy-paste" buffer by selecting "h"

Boot Solaris 11.4 from USB

After shutting down the OS, while on the console port, attempt to boot from 11.4, which is too new:

Install Solaris 11.4

UnConfigure / Configure

Solaris 10, offered an option to perform a "sys-unconfig", to restore an OS back to factory settings. In Solaris 11, this has been replaced with another option called "sysconfig configure -s" or "sysconfig configure -s --destructive" to destroy the initial user home account to also be destroyed.

This option is good if moving a chassis to a different location.

Some interesting articles that I passed over recently, which have interesting implications to Network and Systems Management:

• Seagate ships slim, fast Pulsar XT SSD
  Faster SSD's offer improvement opportunities for network management systems.
  Seagate is shipping its Pulsar XT.2 SSD with an SPC-1C benchmark rating, and has a second slower but higher capacity SSD coming soon. The 2.5-inch Pulsar XT.2 is available in up to 400GB capacities, has a 6Gbit/s SAS interface, and is built from fast single-level–cell flash.



• Energy scavenger eats leftover wireless signals
  Technology from GA-USA offers important possibilities for remore network probes.
  A group of researchers led by Manos Tentzeris at Georgia Tech are working on antennae that could scavenge stray wireless signals to power small sensors or microprocessors. If you’re close enough to a large radio transmitter, harvesting stray energy is pretty straightforward



• Cisco lays off 6,500 workers, execs; And sells off another 5,000 to Foxconn
  Network giant Cisco cutting staff indicates changes in the overall market.
  Networking giant Cisco Systems is going to get 11,500 employees smaller. After Wall Street closed today, Cisco said that it was going to cut 6,500 workers to get its costs more in line with its revenue streams, and added that it was selling off a set-top box manufacturing plant in Mexico with 5,000 employees to Chinese manufacturing Foxconn Technology Group.



• Ahead of Apple Q3 earnings, NPD expects near record Mac sales
  More Apple hardware means more diversity in the Network Management arena.
  According to numbers from the NPD Group, the answer is yes. Piper Jaffray analyst Gene Munster reported on NPD's numbers in a note to investors on Monday (as seen by AppleInsider), noting that Mac sales were up by 12 percent year-over-year for every month in the quarter.



• New fuel discovered that reversibly stores solar energy
  Solar energy is important for remote Network probes.
  Alexie Kolpak and Jeffrey Grossman from the Massachusetts Institute of Technology propose a new type of solar thermal fuel that would be affordable, rechargeable, thermally stable, and more energy-dense than lithium-ion batteries. Their proposed design combines an organic photoactive molecule, azobenzene, with the ever-popular carbon nanotube.



• Oracle bestows SPARC T4 beta on 'select' customers
  The Gold-Standard platform in Network Management has received an upgrade.
  According to a blog post by Masood Heydari, vice president of hardware development at Oracle, the beta program will be available to a "select number of enterprises" – and as you might expect, the company is looking for enthusiastic shops that aim to use early access to Sparc T4 multi-core systems as a competitive advantage.

Enjoy the month!

[UltraSPARC T3 Micrograph]

CoolThreads UltraSPARC and SPARC Processors

Abstract:
Processor development takes an immense quantity of time, to architect a high-performance solution, and an uncanny vision of the future, to project market demand and acceptance. In 2005, Sun embarked on a bold path moving toward many cores and many threads per core. Since the purchase of Sun by Oracle, the internal SPARC road map from Sun had clarified.


[UltraSPARC T1 Micrograph]
Generation 1: UltraSPARC T1
A new family of SPARC processors was announced by Sun on 2005 November 14.

• Single die
• Single socket
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4 threads/core
• 1 shared floating point core
• 1.0 GHz - 1.4 GHz clock speed
• 279 million transisters
• 378 mm2
• 90 nm CMOS (TI)
• 1 JBUS port
• 3 Megabyte Level 2 Cache
• 1 Integer ALU per Core
• ??? Memory Controllers
  
• 6 Stage Integer Pipeline per Core
• No embedded Ethernet into CPU
• Crypto Algorithms: ???
  

Platform designed as a front-end server for web server applications. With a massive number of cores, it was designed to provide web-tier performance similar to existing quad-socket systems leveraging a single socket.

To understand the ground-breaking advancement in this technology, most processors were single core, with an occasional dual core processor (with cores glued together through a more expensive process referred to as a multi-chip module, driving higher software licensing costs for those platforms.)


Generation 2: UltraSPARC T2
The next generation of the CoolThreads processor was announced by Sun on 2007 August.

• Single die
• Single Socket
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4, 6, 8 floating point units
• 8 threads/core
• 1.2 GHz - 1.6 GHz clock speed
• 503 million transisters
• 342 mm2
• 65 nm CMOS (TI)
• 1 PCI Express port (1.0 x8)
• 4 Mageabyte Level 2 Cache
• 2 Integer ALU per Core
• 4x Dual Channel FBDIMM DDR2 Controllers
• 8 Stage Integer Pipeline per Core
• 2x 10 GigabitEthernet on-CPU ports
• Crypto Algorithms: DES, Triple DES, AES, RC4, SHA1, SHA256, MD5, RSA-2048, ECC, CRC32

This processor was designed for higher compute intensive requirements and incredibly efficient network capacity. Platform made an excellent front-end server for applications as well as Middleware, with the ability to do 10 Gigabit wire-speed encryption with virtually no CPU overhead.

Competitors started to build Single-Die dual-core CPU's with Quad-Core processors by gluing dual-core processors into a Multi-Chip Module.


[UltraSPARC T2 Micrograph]
Generation 3: UltraSPARC T2+
Sun quickly released the first CoolThreads SMP capable UltraSPARC T2+ in 2008 April.

• Single die
• 1-4 Sockets
  
• 64 bits
• 4, 6, 8 integer cores
• 4, 6, 8 crypto cores
  
• 4, 6, 8 floating point units
• 8 threads/core
• 1.2 GHz - 1.6 GHz clock speed
• 503 million transisters
• 342 mm2
• 65 nm CMOS (TI)
• 1 PCI Express port (1.0 x8)
• 4 Megabyte Level 2 Cache
• 2 Integer ALU per Core
• 2x? Dual Channel FBDIMM DDR2 Controllers
• 8? Stage Integer Pipeline per Core
• No embedded Ethernet into CPU
• Crypto Algorithms: DES, Triple DES, AES, RC4, SHA1, SHA256, MD5, RSA-2048, ECC, CRC32
  

This processor allowed the T processor series to move from the Tier 0 web engines and Middleware to Application tier. Architects started to understand the benefits of this platform entering the Database tier. This was the first Coolthreads processor to scale past 1 and up to 4 sockets.

By this time, competition really started to understand that Sun had properly predicted the future of computing. The drive toward single-die Quad-Core chips have started with Hex-Core Multi-Chip Modules being predicted.


Generation 4: SPARC T3
The market became nervous with Oracle purchasing Sun. The first Oracle branded CoolThreads SMP capable UltraSPARC T3 was launched in in 2010 September.

• Single die
• 1-4 Sockets
  
• 64 bits
• 16 integer cores
• 16 crypto cores
  
• 16 floating point units
• 8 threads/core
• 1.67 GHz clock speed
• ??? million transisters
  
• 377 mm2
• 40 nm
  
• 2x PCI Express port (2.0 x8)
• 6 Megabyte Level 2 Cache
• 2 Integer ALU per Core
• 4x DDR3 SDRAM Controllers
• 8? Stage Integer Pipeline per Core
• 2x 10 GigabitEthernet on-CPU ports
• Crypto Algorithms: DES, 3DES, AES, RC4, SHA1, SHA256/384/512, Kasumi, Galois Field, MD5, RSA to 2048 key, ECC, CRC32

This processor was more than what the market was anticipating from Oracle. This processor took all the features of the T2 and T2+ combined them into the new T3 with an increase in overall features. No longer did the market need to choose between multiple sockets or embedded 10 GigE interfaces - this chip has it all plus double the cores.

The market, immediately before this release, the competition was releasing single die hex-core and octal-core CPU's using multi-chip modules, by gluing them together. The T3 was a substantial upgrade over the competition by offering double the cores on a single die.


Generation 5: SPARC T4
Oracle indicated in December 2010 that they had thousands of these processors in the lab and predicted this processor will be released end of 2011.

After the announcement, a separate press release indicated processors will have a renovated core, for higher single threaded performance, but the socket will offer half the cores.

Most vendors are projected to have 8 core processors available (through Multi-Chip modules) by the time the T3 is released, but only the T4 should be on a single piece of silicon during this period.


[2010-12 SPARC Solaris Roadmap]
Generation 6: SPARC T5

Some details on the T5 were announced with the T4. Processors will use the renovated T4 core, with a 28nm process. This will return to 16 cores per socket again. This processor may be the first Coolthreads T processor able to scale from 1-8 processors. It is projected to appear in early 2013.

Some vendors are projecting to have 12 core processors on the market using Multi-Chip Module technology, but when the T5 is released, this should still be the market leader in 16 cores per socket.

Network Management Connection

Consolidating most network management stations in a globalized environment works very well with the Coolthreads T-Series processors. Consolidating multiple slower SPARC platforms onto single and double socket T series have worked well over the past half decade.

While most network management polling engines will scale linearly with these highly-threaded processors, there are some operations which are bound to single threads. These type of processes include event correlation, startup time, and syncronization after a discovery in a large managed topology.

The market will welcome the enhanced T4 processor core and the T5 processor, when it is released.