Synopsys SLM ext-RAM is a comprehensive, user programmable high-quality test and diagnostics solution for logic-to-memory interconnect and DRAM memories. This fully synthesizable algorithmic engine can support various protocols such as DDR/LPDDR/HBM and cHBM (custom HBM) and is process technology, foundry and DRAM vendor agnostic. With the provided scripts and reference design, SoC designers can leverage ext-RAM across the silicon lifecycle by accelerating time to closure during design, maximizing yield during production and increasing reliability in-field
Common use case scenarios for customers leveraging multi die (2.5D/3D-IC) designs include those who ship full systems or multi-chip modules (MCM). The Synopsys SLM ext-RAM is commonly deployed in conjunction with the SLM STAR Hierarchical System (SHS) which in turn can be used to automatically initialize the memory PHY via JTAG using pre-validated ATE patterns (for Synopsys PHYs) before initiating DRAM testing