Synopsys offers software-driven low power exploration, analysis and optimization from architecture to signoff. The solution is built around industry-leading products for each stage of the design flow:
- Platform ArchitectTM for architecture exploration and early performance power tradeoffs using pre-RTL architecture models and software workloads
- ZeBu® Empowerfor power emulation with the capacity and performance for profiling software workloads to identify key windows of interest for further analysis and exploration
- SpyGlass® Power for RTL power exploration with fast turnaround time during initial stages of RTL development
- PrimePower RTLwith RTL Architectfor RTL power exploration with high accuracy as the RTL matures
- Fusion CompilerTMfor RTL to GDSII implementation with the best PPA (Power-Performance-Area) results. Fusion of PrimePower for signoff power and RedHawk Analysis Fusionfor power integrity ensure fast convergence
- Synopsys TestMAXTM for power-optimized automatic test pattern generation (ATPG)
- PrimePower for golden power signoff
Synopsys' solutions enable SoC designers to achieve optimal energy efficiency by maximizing power-reduction opportunities at each stage of design flow while meeting PPA targets.