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High-Bandwidth, Ultra-Low Latency Networking

Synopsys’ Ultra Ethernet IP delivers the ultra-low latency and high bandwidth necessary to connect a million nodes building a massive AI scale-out network. The best-in-class IP solution, consisting of MAC and PCS controller, PHY, and verification IP, maximizes bandwidth at data rates up to 1.6 Tbps. With integrated error correction and built-in verification features, the IP provides the system integrity and top-tier performance to support AI back-end connectivity. Built on silicon-proven technology, decades of experience, and compliant with evolving Ultra Ethernet standards, designers can reduce risk and accelerate time to market for the world's most advanced SoCs.

What's New

White Paper

Enabling the 448G Era

System architecture and standards for next-gen AI networks

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Webinar

How PCIe Multistream Architecture is enabling AI Connectivity

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White Paper

PCIe 7.0 in Practice

Design Considerations for Storage, Networking, and AI

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Key Benefits

Features

  • Ethernet MAC, PCS & PHY to complete a full Ultra Ethernet interface stack
  • Supports evolving IEEE 802.3 and OIF-224G electrical standards
  • Provides support for 4 x 400G, 2 x 800G, and 1.6T Ethernet rates using 112Gbps and 224Gbps SerDes
  • Meets performance criteria for chip-to-chip, chip-to-module, and long reach copper/backplane interconnects
  • Incorporates a DAC-based PAM-4 transmitter with feed-forward equalization (FFE)
  • High-performance receiver equalization, supporting a channel loss up to 45dB
  • Utilizes low jitter phase-locked loops (PLLs) for robust timing recovery and improved jitter performance
  • Includes Ethernet PCS RS-FEC functions

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Related Products and Solutions

Synopsys provides the industry’s broadest IP portfolio for HPC and AI, enabling designers with best-in-class IP interfaces so designers can speed time to market and achieve first pass silicon success.

Interoperability

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