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All 4 Verilog 2 JavaScript 1 Python 1

jiru1997 / Cardinal-NIC-and-Chip-Multiprocessor

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Cardinal NIC and Chip Multiprocessor

verilog soc designcompiler innovus simvision

Updated Dec 1, 2021
Verilog

jiru1997 / Cardinal_router

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Cardinal_router

router verilog simvision

Updated Nov 17, 2021
Verilog

aqdarahmad / coincident-decoding-verification-uvm

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UVM-based verification of a coincident decoding digital design using SystemVerilog, including functional checking, coverage analysis with IMC, and waveform debugging with SimVision.

debugging system-verilog decoders uvm-verification simvision imc-integrated-metrics-center

Updated Dec 13, 2025
JavaScript

grep for waveforms — read signal values, clock frequency, and transitions from Synopsys FSDB, Cadence SST2, and open VCD dumps, straight from the shell. Deterministic output, runs locally, no viewer. CLI + MCP server + Claude Code skill.

cli mcp waveform eda verilog systemverilog gtkwave uvm vcd verdi ai-agents fsdb design-verification xcelium simvision sst2 llm rtl-simulation claude-code claude-code-skill

Updated Sep 8, 2026
Python

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