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Explicity disable LSX feature for loongarch64-unknown-none target
#146032
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The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
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Aug 30, 2025
These commits modify compiler targets.
(See the Target Tier Policy.)
Thanks!
r? lqd @bors r+ rollup
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Sep 2, 2025
I wanted to ask
bare-metal target with hardware floating-point support and should not enable SIMD extensions by default
why is this?
It should be like x86, they are extensions that are not necessarily supported by the cpu baseline defined by the target.
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Sep 2, 2025
Explicity disable LSX feature for `loongarch64-unknown-none` target The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
GuillaumeGomez
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Sep 2, 2025
Explicity disable LSX feature for `loongarch64-unknown-none` target The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
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Sep 2, 2025
Rollup of 8 pull requests Successful merges: - #139113 (unstable book: in a sanitizer example, check the code) - #145823 (editorconfig: don't use nonexistent syntax) - #145962 (Ensure we emit an allocator shim when only some crate types need one) - #146032 (Explicity disable LSX feature for `loongarch64-unknown-none` target) - #146090 (Derive `PartialEq` for `InvisibleOrigin`) - #146120 (Correct typo in `rustc_errors` comment) - #146121 (fix: Filter suggestion parts that match existing code) - #146134 (llvm: nvptx: Layout update to match LLVM) r? `@ghost` `@rustbot` modify labels: rollup
tgross35
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Sep 3, 2025
Explicity disable LSX feature for `loongarch64-unknown-none` target The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
bors
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Sep 3, 2025
Rollup of 8 pull requests Successful merges: - #139113 (unstable book: in a sanitizer example, check the code) - #145279 (Constify conversion traits (part 1)) - #145414 (unicode-table-generator refactors) - #145823 (editorconfig: don't use nonexistent syntax) - #145944 (std: Start supporting WASIp2 natively ) - #145961 (resolve: Avoid a regression from splitting prelude into two scopes) - #146032 (Explicity disable LSX feature for `loongarch64-unknown-none` target) - #146106 (fix(lexer): Only allow horizontal whitespace in frontmatter ) r? `@ghost` `@rustbot` modify labels: rollup
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Sep 3, 2025
Rollup of 8 pull requests Successful merges: - #139113 (unstable book: in a sanitizer example, check the code) - #145279 (Constify conversion traits (part 1)) - #145414 (unicode-table-generator refactors) - #145823 (editorconfig: don't use nonexistent syntax) - #145944 (std: Start supporting WASIp2 natively ) - #145961 (resolve: Avoid a regression from splitting prelude into two scopes) - #146032 (Explicity disable LSX feature for `loongarch64-unknown-none` target) - #146106 (fix(lexer): Only allow horizontal whitespace in frontmatter ) r? `@ghost` `@rustbot` modify labels: rollup
Zalathar
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Sep 3, 2025
Explicity disable LSX feature for `loongarch64-unknown-none` target The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
bors
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Sep 3, 2025
Rollup of 9 pull requests Successful merges: - #145279 (Constify conversion traits (part 1)) - #145414 (unicode-table-generator refactors) - #145823 (editorconfig: don't use nonexistent syntax) - #145944 (std: Start supporting WASIp2 natively ) - #145961 (resolve: Avoid a regression from splitting prelude into two scopes) - #146032 (Explicity disable LSX feature for `loongarch64-unknown-none` target) - #146106 (fix(lexer): Only allow horizontal whitespace in frontmatter ) - #146112 (don't uppercase error messages) - #146154 (CI: rfl: move job forward to Linux v6.17-rc3 plus 2 commits) r? `@ghost` `@rustbot` modify labels: rollup
bors
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Sep 3, 2025
Rollup of 8 pull requests Successful merges: - #145279 (Constify conversion traits (part 1)) - #145414 (unicode-table-generator refactors) - #145823 (editorconfig: don't use nonexistent syntax) - #145944 (std: Start supporting WASIp2 natively ) - #145961 (resolve: Avoid a regression from splitting prelude into two scopes) - #146032 (Explicity disable LSX feature for `loongarch64-unknown-none` target) - #146106 (fix(lexer): Only allow horizontal whitespace in frontmatter ) - #146154 (CI: rfl: move job forward to Linux v6.17-rc3 plus 2 commits) r? `@ghost` `@rustbot` modify labels: rollup
rust-timer
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Sep 3, 2025
Rollup merge of #146032 - heiher:loong64-none-no-lsx, r=lqd Explicity disable LSX feature for `loongarch64-unknown-none` target The `loongarch64-unknown-none` target is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.
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The
loongarch64-unknown-nonetarget is a bare-metal target with hardware floating-point support and should not enable SIMD extensions by default. However, LLVM's LoongArch64 backend enables LSX implicitly, inadvertently activating SIMD instructions for this target. This patch explicitly disable LSX feature to prevent unintended SIMD usage.