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Fix wrong cache line size of riscv64 #145078
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Confirmed by looking at all readily available implementations.
@bors try jobs=dist-riscv64-linux
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Fix wrong cache line size of riscv64 try-job: dist-riscv64-linux
@bors r+ rollup=always
+1 (no changes required) except that "wrong" in the title seems a bit misleading (so I'll leave a note here).
The RISC-V architecture (itself) defines nothing about cache line size (in fact, we don't actually need cache in the minimal configuration).
However, for baseline purposes, there's RISC-V Profiles specification1 .
In that specification, profiles for application-class processor environment, RVA22U64/S64 and RVA23U64/S64 mandate that the Zic64b extension must be present (i.e. cache block size must be exactly 64-bytes and must be naturally aligned).
Footnotes
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For instance, Ubuntu 25.10 will require RVA23U64/S64 baseline. ↩
Rollup of 6 pull requests Successful merges: - #142215 (Use -Zmir-opt-level=0 in tests for MIR building) - #143341 (Mention that casting to *const () is a way to roundtrip with from_raw_parts) - #145078 (Fix wrong cache line size of riscv64) - #145290 (Improve std::fs::read_dir docs) - #145335 (Move WTF-8 code from std into core and alloc) - #145904 (Move `riscv64-gc-unknown-linux-musl` from Tier 2 with Host tools to Tier 2) r? `@ghost` `@rustbot` modify labels: rollup
Rollup merge of #145078 - minxuanz:riscv-cacheline, r=samueltardieu Fix wrong cache line size of riscv64 see https://go-review.googlesource.com/c/go/+/526659, All of riscv CPU using 64B for cache-line size.
see https://go-review.googlesource.com/c/go/+/526659, All of riscv CPU using 64B for cache-line size.