VHDL: Assert generic range and produce error with full instance path if it fails

Question

In my VHDL entity there is a generic that has integer value. I have written an assert statement to check its range. I believe that the assert statement will execute when the module is simulated and also when it is synthesized.

 assert (RAM_TYPE>=0 and RAM_TYPE<=2)
 report "RAM_TYPE outside range"
 severity failure;

I need to print the whole hierarchy name of the instance of this module if the assert statement fails. How can this be done in VHDL? I believe that the options change between VHDL-93 and VHDL-2008 but cannot say anymore.

Answer 1

VHDL contains the following attributes that can be used with a process and some other named segments of code:

’simple_name 
’instance_name
’path_name

These work in simulation but synthesis failed in Quartus. Thus, it seems that they are only meant for simulation. So the answer to the question is that, it is not possible.