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In verilog, what are some examples of when one should opt to use the high impedance value Z?
Thanks
asked Dec 16, 2012 at 20:23
1 Answer 1
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Whenever you need to model a tristate or open-collector (open-drain) driver, such as on a bidirectional signal or a tristate bus.
answered Dec 16, 2012 at 22:49
lang-vhdl