Initialize array with variable length in vhdl

Question

I want to initialize an array with length dependent on a signal I set earlier (as can be seen in the code below), unfortunately I can't quite get the datatypes to line up and am having a hard time finding documentation on this.

signal count : unsigned(31 downto 0) := 4;
type my_array is array (0 to count) of std_logic_vector(255 downto 0);
signal my_signals : my_array;

I've tried switching unsigned to integer and natural, yet I keep getting the error only scalar types may be constrained by range . How would you resolve this?

• user8352: The question snippet has two issues, the type of the numeric literal (4) can't be an array type, the second is the error you show. This is valid VHDL but doesn't get you a variable number of array elements, depending on the initial value of count.

Answer 1

The type definition requires a constant to define the range. This is used during simulator compilation or during synthesis. It is fixed once the circuit, real or simulated, is operating.

Signals can change and are therefore not constant. Their value changes during circuit operation.

So the two are incompatible. Use a constant.

Your question doesn't describe why you want to do such a thing so I can't advise better solutions to it.

• user256309: Thank you for your answer, that did the trick! The reason I want to do this, is because I have a certain process I want to parallelize using multiple of the same component. I generate these using a for generate loop where I then assign each of their signals to their spot in the array containing all signals of that type. I would upvote your comment too, but unfortunately don't have enough reputation.
• TonyM: @NicolasSchapeler, a pleasure to help. I've done the same thing many times myself, expanding a few root constants into derived constants, types, signals and generates to instantiate arrays of entities with all the plumbing.
• tim: For extra flexibility, you could make the constant a generic parameter and set it in the external for generate loop; rather than declaring the constant inside the entity.