How to "Pull Down" LVDS input in FPGA

Question

One of my hardware modules uses a state machine which is triggered when the input signal IN is HI (that's an LVDS pair on Microsemi proASIC FPGA). The problem arises when nothing is connected to the LVDS input pair - so my state machine triggers spontaneously, as expected. I wanted to "Pull down" the input and tried to set the constraints for IN_P and IN_N pads with -res_pull down and -res_pull up respectively in the constraints file as suggested here. This gave me errors saying that those are unknown pin attributes. And indeed, when I opened the interactive compile interface, there was no option to select up/down pin pulling for the LVDS standard.

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But then, how to set my LVDS input to a known (low) state when it is not connected? Is this limitation Microsemi specific, device specific, or there is no such thing as pulling LVDS pairs internally?

• DonFusili: What device? I've had to use external pull up/downs with microsemi devices before.
• Nazar: @DonFusili It's a M1A3P1000L

Answer 1

Under the set_io command (page 282, specifically), it lists that only certain IO standards can take pullups/pulldowns. Newer versions of this guide list what standards can take pullups/pulldowns, but aren't for the ProASIC3 specifically. Unfortunately, LVDS isn't one of the standards that can take pullups/pulldowns.

• Nazar: So, need to use external resistors?
• Drew: It appears that way, unfortunately.