• # Génial

    Posté par (site web personnel) . En réponse au lien RaspberryPi lance la RP2350 qui embarque 2 core RISC-V... en plus de 2 core ARM !. Évalué à 8.

    The RISC-V based Hazard3 core featured in RP2350 was designed by Luke Wren, an engineer at Raspberry Pi. Hazard3 is completely his own design, licensed to Raspberry Pi. Luke started designing processors based on 7400-series logic in his free time when he was 16, and has progressed to working with the RISC-V ISA, inspired by the ability to experiment and extend on top of a clean, industry standard architecture. The momentum and ecosystem of RISC-V means that his work is supported by mature tools like GCC and LLVM, making it easy to develop for.

    Hazard3 is a fork of one of Luke’s previous designs, Hazard5, with a focus on best possible performance at MCU clock frequencies inside a small silicon footprint. The process of development for the first instance of Hazard3 took less than a week from forking Hazard5! Luke is excited for the educational possibilities enabled by Hazard3 and has made it available on his GitHub page under an Apache Licence Version 2.0 for anyone to use, and to learn from. Future processor designers can view the unedited commit history for Hazard3 and learn from Luke’s development process, including his mistakes and how he corrected them. Students studying processor design can develop and test software workloads on RP2350, then look at the Hazard3 source, modify the processor to include their own custom instructions, then test their new version on an FPGA.