MAC (Media Access Control)
PHY (Physical Layer)
MII, RMII, SMII, GMII, RGMII, SGMII, XGMII, XLGMII, CGMII, CDMII, DCCCMII/MDCMII MAC interfaces
TBI, XFBI, XSBI, XXVSBI, XLSBI, LSBI, CSBI, XLAUI, CAUI, CCXBI, CDXBI, DCCCXBI, MDCXBI and Base-T interfaces
AVB/TSN: Supports Frame Preemption, AVB 1722 Data & Control Frames, credit-based shaper
PAM3/4 encoding for applicable interfaces
Transmit and receive of multiple packet types in layers 2/3/4/7
Forward error correction, auto-adaptation, auto-negotiation, and Reed Solomon Forward error correction for applicable interfaces
Generates and receives MAC Data, Control, PPP, PTP 1588, VLAN, SVLAN, JUMBO FRAMES
Skew insertion and lane reversal
GCM-AES-XPN-128/192/256 MACsec authentication/encryption
Base T, Base-X, Base-R, Base KR encoding/decoding
Send any legal or error injected packet
Auto-adaptation, auto-negotiation and FEC
Customize any field in a packet or between packets to a specific value
SGMII, QSGMII, USGMII, USXGMII
Send raw user defined packets
Simple, Flexible Control to modify any outgoing Codegroups/Codewords
Inject error in any field of a packet or between packets
Support Flex E 2.1, programmable number of Flex E Client/PHY, slot programming, overhead timer
Add multiple errors in a packet
Force loss of synchronization, mimic cable pull scenario
Low power idles (EEE)
Inject error in any field of a packet, Lower-level transactions to enable error injection at any PCS level
Send any legal or error injected packet
Callbacks at 66bit encoded /scrambled level, at transcoder level in transmitter, receiver and monitor for manipulation of data stream for Base-R interfaces
Customize any field in a packet or between packets to a specific value
Clock Data Recovery (CDR)
Configurable parallel interface width for PCS interfaces
Configurable LPI, Align, Auto -Negotiation, Auto Adaption, Hi SER, BER timers