How Multi-Die Designs Boost Automotive Chip Innovation BLOG Nov 04, 2025/3 min read BLOG How Multi-Die Designs Boost Automotive Chip Innovation By Sajani Patel, Hezi Saar Tags: Multi-Die, Silicon Lifecycle Management, Design, About Synopsys, Physical Implementation, Automotive, Silicon IP, Verification, Virtual Prototyping, 3DIC Design
Shaping the Future of Semiconductor Design Through Collaboration: Synopsys Wins Multiple TSMC OIP Partner of the Year Awards BLOG Oct 01, 2025/3 min read BLOG Shaping the Future of Semiconductor Design Through Collaboration: Synopsys Wins Multiple TSMC OIP Partner of the Year Awards By Arun Bhattacharya Tags: Multi-Die, AI & Machine Learning, RF Design, About Synopsys, Interface IP, Silicon Lifecycle Management, Signal & Power Integrity, Design, Design Technology Co-Optimization, Photonic, Silicon IP, Analog Design, 3DIC Design
High Bandwidth Memory (HBM) at the AI Crossroads: Customization or Standardization? BLOG May 28, 2025/3 min read BLOG High Bandwidth Memory (HBM) at the AI Crossroads: Customization or Standardization? By Greg Sorber Tags: Executive Voices, Multi-Die, AI & Machine Learning, Memory, Design, About Synopsys, Interface IP, Verification IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design
Multi-Die Design Challenges: Industry Leaders Provide Insights and Guidance BLOG May 15, 2025/4 min read BLOG Multi-Die Design Challenges: Industry Leaders Provide Insights and Guidance By Frank Malloy Tags: Multi-Die, Design, About Synopsys, 3DIC Design
Synopsys Bold Prediction: 50% of New HPC Chip Designs Will Be Multi-Die in 2025 BLOG Jan 21, 2025/2 min read BLOG Synopsys Bold Prediction: 50% of New HPC Chip Designs Will Be Multi-Die in 2025 By Shekhar Kapoor, Michael Posner Tags: Multi-Die, Design, About Synopsys, 3DIC Design
Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design BLOG Dec 05, 2024/2 min read BLOG Collaboration for Innovation: How Synopsys and TSMC are Advancing Chip Design By Synopsys Editorial Staff Tags: Multi-Die, Design, About Synopsys, Manufacturing, Foundation IP, HPC, Data Center, Silicon IP, 3DIC Design
GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package BLOG Jun 12, 2024/5 min read BLOG GUC Leverages 3DIC Compiler to Enable 2.5D/3D Multi-Die Package By Synopsys Editorial Staff, WeiHsun Liao Tags: Customer Spotlight, Multi-Die, Design, About Synopsys, 3DIC Design
3 Key Technologies that Will Transform Electronic Design in 2023 BLOG Jan 03, 2023/6 min read BLOG 3 Key Technologies that Will Transform Electronic Design in 2023 By Sanjay Bali Tags: Cloud, Multi-Die, Silicon Lifecycle Management, Design, About Synopsys, 3DIC Design
What is a SmartNIC? BLOG Jul 11, 2022/5 min read BLOG What is a SmartNIC? By Rita Horner Tags: Multi-Die, AI & Machine Learning, Design, Security IP, About Synopsys, Foundation IP, HPC, Data Center, Silicon IP, Verification, 3DIC Design
How to Design SoCs for the SysMoore Era BLOG Feb 16, 2022/6 min read BLOG How to Design SoCs for the SysMoore Era By Dr. Ming Zhang Tags: Multi-Die, AI & Machine Learning, Design, About Synopsys, 3DIC Design
What is Quantum Computing? - Applications & Challenges BLOG Nov 08, 2021/8 min read BLOG What is Quantum Computing? - Applications & Challenges By Kenneth Larsen Tags: AI & Machine Learning, Design, About Synopsys, 3DIC Design
2021 ERI Summit & Microsystems Technology Office Symposium BLOG Oct 11, 2021/3 min read BLOG 2021 ERI Summit & Microsystems Technology Office Symposium By Ian Land Tags: Aerospace & Government, Silicon Lifecycle Management, Design, About Synopsys, Design Technology Co-Optimization, Silicon IP, 3DIC Design
Hyper-Convergent Chip Design Tools Power SoC Innovation BLOG Sep 29, 2021/5 min read BLOG Hyper-Convergent Chip Design Tools Power SoC Innovation By Shekhar Kapoor, Mark Richards Tags: Design, About Synopsys, 3DIC Design
How 3DIC Design Tools Enhance Productivity & Performance BLOG Mar 03, 2021/5 min read BLOG How 3DIC Design Tools Enhance Productivity & Performance By Shekhar Kapoor, Kenneth Larsen Tags: Multi-Die, Design, About Synopsys, 3DIC Design
Defining the AI Era with the IBM Research AI Hardware Center BLOG Oct 20, 2020/4 min read BLOG Defining the AI Era with the IBM Research AI Hardware Center By Arun Venkatachar Tags: Multi-Die, AI & Machine Learning, Emulation, About Synopsys, Interface IP, Virtual Prototyping, Design, Manufacturing, Design Technology Co-Optimization, Processor Solutions, Silicon IP, Verification, 3DIC Design