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Devraux/STM32F746-oscilloscope-LVGL

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DISCOVERY STM32F746ng oscilloscope

Project version: 1.5)

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Block diagram

image

ECG signal(10kHz)

ecg

Sine signal(120kHz)

sin

Square Wave test (STM32 PWM)

Image

Todo:

  • LVGL configuration( LVGL[window drawer] -> FMC[Flexible Memory Control] -> LTDC driver)
  • DISCOVERY external SDRAM connection with LTDC/FMC
  • STM32F746 hardware configuration - ADC(circular mode), DMA(double buffering, circular mode), FMC, LTDC
  • DMA double buffering mode configuration
  • Math tool(basic version)
  • Project optimization and code refactoring
  • STOP/RUN feature implementation
  • Osiclooscope self test(external PWM generator based on same chip)
  • Simple manual user interface - buttons and encoders
  • horizontal and vertical stretching
  • ADC performance improvement(sampling)
  • Cursors
  • DS/AC COUPLING
  • PCB hardware fabrication
  • Signal attenuation feature and offset manage(remove or add offset)
  • Additional options
  • Advanced testing(bandwidth etc.)
  • DSP features(hardware(STM32F746 FPU)) like FFT etc.

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