Problem 4: Sketch/draw the Output waveform of a D Flip-flop for the input waveforms shown below. Assuming that initially Output-0. Requirement: please include the Clk and Input waveforms in your solution so that the alignment among different waveforms is clear. Input- -D D -Output A D-latch D-latch CIK CIK CIK D Flip-flop Cik ♫ Input

create the schematic needed for part b and c please

check the image for question

create the schematic needed for part d please

Give the output waveform for Q if the inputs in Figure 4 are fed into a rising edge triggered J-K Flip-Flop assuming that Q is initially LOW. Please answer in typing format please ttt the

Using D flip-flops, design a logic circuit for the finite-state machine described by the state assigned table in Figure P9.6. Present Next State Output State x=0 x=1 Y2V1 Y2Y1 Y2Y1 Z 00 00 01 01 10 88 00 11 00 00 10 0 11 00 10 1 I need a step by step solution

Logic Time diagram

Determine the output Q for the given J-K flip flop and the waveforms. HIGH PRE J. CLR PRE %3D 3D