a) Design a combinational circuit that would take a 3-bit binary number and generate an output if the input value in decimal is either divisible by 2 or 3. iii) Explain and show how you would implement this circuit using a 4-to-1 Multiplexer and other appropriate logic gates. Use a block diagram for the multiplexer.

5/ Select a suitable example for combinational logic circuit. A) None of the given choices B) Decoders C) Latches D ) PLA

Q4) Design an arithmetic logic unit (ALU) that can do the following operations (A AND B, A-B, B-A, A OR B. A+B, NOT A and NOT B) and write the Truth Table for each unit?

What is the boolean expression for the logic gate in the picture?

Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).

Draw in Table 3 the circuit schematic of each segment using the basic logic gates in kmap

Q) You want to design a synchronous counter sequential (sequential) logic circuit. Counting from 9 to 0 and will not count the last digit of your student number. (a) List the steps that you will apply in the design approach. State Chart and State Create the table. (b) Design the sequential circuit using JK Flip-Flop. Explain each step. Desired action show that you have done it. " last digit student num:4 " Not : I want the solution to contain tables and equations, and the electrical circuit resulting from tables and equations, as in the picture that I attached,And if possible, I want the solution on paper if possible.

what is the relation bet are the relations be Carry Out outputs of figures in step 3 and step 4? What is the relation between inputs & the sum output in half adder? What is the purpose of half adder and full adder logic circuits? full

e) Explain, with the help of annotated drawings, the definition and use of noise margins in logic gates.