1. Design an Excess-3 (Ex-3) checker circuit for an input of 4-bits. (the output is logic 1 if the input is a valid Excess-3 and is 0 otherwise).

Q1: The input waveforms in Figure below are applied to a 2-bit adder. Determine the waveforms for the sum and the output to the relation inputs by in carry constructing a timing diagram. A2 B1 B2 Cin

(b) Using a synchronous binary counter as shown in Figure Q2(b), design and draw a counter to generate the following repeating sequences 2 to 14 repeatedly for a free running clock. If the circuit happens to enter any of the states 15 or 0 or 1, what are the next states of your circuit? A A Syn. Binary Counter Q3 Q2 Q1 Qo →Asyn. clear Syn. load CLK D3 D2 D1 Do ↑↑↑↑

parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.

The 3-bit shift register is shifted five times to the right with the serial input being 1011101. What is the content of the register? (Write your answer using only 0s and/or 1s.)

Design a combinational circuit using multiplexer for a car chime based on thefollowing system: A car chime or bell will sound if the output of the logic circuit(X) is set to a logic ‘1’. The chime is to be sounded for either of the followingconditions:• if the headlights are left on when the engine is turned off and• if the engine is off and the key is in the ignition when the door is opened.Use the following input names and nomenclature in the design process:• ‘E’ – Engine. ‘1’ if the engine is ON and ‘0’ if the engine is OFF• ‘L’ – Lights. ‘1’ if the lights are ON and ‘0’ if the lights are OFF• ‘K’ – Key. ‘1’ if the key is in the ignition and ‘0’ if the key is not in the ignition• ‘D’ – Door. ‘1’ the door is open and ‘0’ if the door is closed• ‘X’ – Output to Chime. ‘1’ is chime is ON and ‘0’ if chime is OFF

Reduce the Boolean function specified in the truth table below to its minimum SOP form using K-map, where A, B, C are the inputs while X are the outputs. Based on the reduced Boolean function, design the logic circuit using any logic gates. A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 1 с 0 1 0 1 0 1 0 1 X 1 1 0 1 1 1 0 1

1. Use multiplexer IC's to design a combinational circuit with 3 inputs x,y, and z and three outputs A,B, and C. When the binary input is 0,1,2 or 3 the binary output is two greater than the input. When the binary input is 4,5,6, or 7 the output is three less than the input.

Digital logic design Solve it with drawing and simulation lab I need them both to have the full solution. And thanks Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder.

4.8 For the 4-bit weighted-resistor DAC shown in Figure 4.5, determine the output from the resistors to the amplifier for inputs of 0001, 0010, 0100 and 1000 if the inputs are 0 V for a logic O and 5 V for a logic 1.

Answer the D, E and F part

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I need the answer as soon as possible