1//===-- LoongArchAsmBackend.cpp - LoongArch Assembler Backend -*- C++ -*---===// 
  3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
  4// See https://llvm.org/LICENSE.txt for license information. 
  5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
  7//===----------------------------------------------------------------------===// 
  9// This file implements the LoongArchAsmBackend class. 
  11//===----------------------------------------------------------------------===// 
  27 #define DEBUG_TYPE "loongarch-asmbackend" 
  35 Is64Bit(Is64Bit), TargetOptions(
Options) {}
 
 
  37std::optional<MCFixupKind>
 
  39 if (STI.getTargetTriple().isOSBinFormatELF()) {
 
  41#define ELF_RELOC(X, Y) .Case(#X, Y) 
  42#include "llvm/BinaryFormat/ELFRelocs/LoongArch.def" 
  44 .
Case(
"BFD_RELOC_NONE", ELF::R_LARCH_NONE)
 
  45 .
Case(
"BFD_RELOC_32", ELF::R_LARCH_32)
 
  46 .
Case(
"BFD_RELOC_64", ELF::R_LARCH_64)
 
 
  56 // This table *must* be in the order that the fixup_* kinds are defined in 
  57 // LoongArchFixupKinds.h. 
  59 // {name, offset, bits, flags} 
  60 {
"fixup_loongarch_b16", 10, 16, 0},
 
  61 {
"fixup_loongarch_b21", 0, 26, 0},
 
  62 {
"fixup_loongarch_b26", 0, 26, 0},
 
  63 {
"fixup_loongarch_abs_hi20", 5, 20, 0},
 
  64 {
"fixup_loongarch_abs_lo12", 10, 12, 0},
 
  65 {
"fixup_loongarch_abs64_lo20", 5, 20, 0},
 
  66 {
"fixup_loongarch_abs64_hi12", 10, 12, 0},
 
  70 "Not all fixup kinds added to Infos array");
 
  72 // Fixup kinds from .reloc directive are like R_LARCH_NONE. They 
  73 // do not require any extra processing. 
 
  93 switch (
Fixup.getKind()) {
 
  106 Ctx.reportError(
Fixup.getLoc(), 
"fixup value must be 4-byte aligned");
 
  107 return (
Value >> 2) & 0xffff;
 
  113 Ctx.reportError(
Fixup.getLoc(), 
"fixup value must be 4-byte aligned");
 
  114 return ((
Value & 0x3fffc) << 8) | ((
Value >> 18) & 0x1f);
 
  120 Ctx.reportError(
Fixup.getLoc(), 
"fixup value must be 4-byte aligned");
 
  121 return ((
Value & 0x3fffc) << 8) | ((
Value >> 18) & 0x3ff);
 
  124 return (
Value >> 12) & 0xfffff;
 
  126 return Value & 0xfff;
 
  128 return (
Value >> 32) & 0xfffff;
 
  130 return (
Value >> 52) & 0xfff;
 
 
  140 Ctx.reportError(
Fixup.getLoc(), 
"Invalid uleb128 value!");
 
 
  148 return; 
// Doesn't change encoding. 
  150 auto Kind = 
Fixup.getKind();
 
  156 // Fixup leb128 separately. 
  160 // Apply any target-specific value adjustments. 
  163 // Shift the value into position. 
  164 Value <<= Info.TargetOffset;
 
  166 unsigned NumBytes = 
alignTo(Info.TargetSize + Info.TargetOffset, 8) / 8;
 
  169 "Invalid fixup offset!");
 
  170 // For each byte of the fragment that the fixup touches, mask in the 
  171 // bits from the fixup value. 
  172 for (
unsigned I = 0; 
I != NumBytes; ++
I) {
 
 
  177static inline std::pair<MCFixupKind, MCFixupKind>
 
  183 return std::make_pair(ELF::R_LARCH_ADD6, ELF::R_LARCH_SUB6);
 
  185 return std::make_pair(ELF::R_LARCH_ADD8, ELF::R_LARCH_SUB8);
 
  187 return std::make_pair(ELF::R_LARCH_ADD16, ELF::R_LARCH_SUB16);
 
  189 return std::make_pair(ELF::R_LARCH_ADD32, ELF::R_LARCH_SUB32);
 
  191 return std::make_pair(ELF::R_LARCH_ADD64, ELF::R_LARCH_SUB64);
 
  193 return std::make_pair(ELF::R_LARCH_ADD_ULEB128, ELF::R_LARCH_SUB_ULEB128);
 
 
  197// Check if an R_LARCH_ALIGN relocation is needed for an alignment directive. 
  198// If conditions are met, compute the padding size and create a fixup encoding 
  199// the padding size in the addend. If MaxBytesToEmit is smaller than the padding 
  200// size, the fixup encodes MaxBytesToEmit in the higher bits and references a 
  201// per-section marker symbol. 
  203 // Alignments before the first linker-relaxable instruction have fixed sizes 
  204 // and do not require relocations. Alignments after a linker-relaxable 
  205 // instruction require a relocation, even if the STI specifies norelax. 
  207 // firstLinkerRelaxable is the layout order within the subsection, which may 
  208 // be smaller than the section's order. Therefore, alignments in a 
  209 // lower-numbered subsection may be unnecessarily treated as linker-relaxable. 
  210 auto *Sec = 
F.getParent();
 
  211 if (
F.getLayoutOrder() <= Sec->firstLinkerRelaxable())
 
  214 // Use default handling unless linker relaxation is enabled and the 
  215 // MaxBytesToEmit >= the nop size. 
  216 const unsigned MinNopLen = 4;
 
  217 unsigned MaxBytesToEmit = 
F.getAlignMaxBytesToEmit();
 
  218 if (MaxBytesToEmit < MinNopLen)
 
  221 Size = 
F.getAlignment().value() - MinNopLen;
 
  222 if (
F.getAlignment() <= MinNopLen)
 
  226 const MCExpr *Expr = 
nullptr;
 
  227 if (MaxBytesToEmit >= 
Size) {
 
  232 if (SymRef == 
nullptr) {
 
  233 // Define a marker symbol at the section with an offset of 0. 
  234 MCSymbol *Sym = Ctx.createNamedTempSymbol(
"la-relax-align");
 
  236 Asm->registerSymbol(*Sym);
 
  249 F.setLinkerRelaxable();
 
 
  254 int64_t &
Value)
 const {
 
  255 const MCExpr &Expr = 
F.getLEBValue();
 
  257 return std::make_pair(
false, 
false);
 
  259 return std::make_pair(
true, 
true);
 
 
  264 int64_t LineDelta = 
F.getDwarfLineDelta();
 
  265 const MCExpr &AddrDelta = 
F.getDwarfAddrDelta();
 
  267 if (AddrDelta.evaluateAsAbsolute(
Value, *
Asm))
 
  269 [[maybe_unused]] 
bool IsAbsolute =
 
  276 // INT64_MAX is a signal that this is actually a DW_LNE_end_sequence. 
  278 OS << 
uint8_t(dwarf::DW_LNS_advance_line);
 
  282 // According to the DWARF specification, the `DW_LNS_fixed_advance_pc` opcode 
  283 // takes a single unsigned half (unencoded) operand. The maximum encodable 
  284 // value is therefore 65535. Set a conservative upper bound for relaxation. 
  287 unsigned PtrSize = 
C.getAsmInfo()->getCodePointerSize();
 
  288 assert((PtrSize == 4 || PtrSize == 8) && 
"Unexpected pointer size");
 
  291 << 
uint8_t(dwarf::DW_LNE_set_address);
 
  295 OS << 
uint8_t(dwarf::DW_LNS_fixed_advance_pc);
 
  301 OS << 
uint8_t(dwarf::DW_LNS_extended_op);
 
  303 OS << 
uint8_t(dwarf::DW_LNE_end_sequence);
 
  305 OS << 
uint8_t(dwarf::DW_LNS_copy);
 
  308 F.setVarContents(
Data);
 
 
  315 const MCExpr &AddrDelta = 
F.getDwarfAddrDelta();
 
  318 if (AddrDelta.evaluateAsAbsolute(
Value, *
Asm))
 
  321 assert(IsAbsolute && 
"CFA with invalid expression");
 
  325 "expected 1-byte alignment");
 
  327 F.clearVarContents();
 
  332 auto AddFixups = [&Fixups,
 
  333 &AddrDelta](
unsigned Offset,
 
  334 std::pair<MCFixupKind, MCFixupKind> FK) {
 
  343 OS << 
uint8_t(dwarf::DW_CFA_advance_loc);
 
  346 OS << 
uint8_t(dwarf::DW_CFA_advance_loc1);
 
  350 OS << 
uint8_t(dwarf::DW_CFA_advance_loc2);
 
  354 OS << 
uint8_t(dwarf::DW_CFA_advance_loc4);
 
  360 F.setVarContents(
Data);
 
  361 F.setVarFixups(Fixups);
 
 
  367 // We mostly follow binutils' convention here: align to 4-byte boundary with a 
  371 // The remainder is now padded with 4-byte nops. 
  372 // nop: andi r0, r0, 0 
  374 OS.
write(
"0円0円\x40\x03", 4);
 
 
  379bool LoongArchAsmBackend::isPCRelFixupResolved(
const MCSymbol *SymA,
 
  381 // If the section does not contain linker-relaxable fragments, PC-relative 
  382 // fixups can be resolved. 
  383 if (!
F.getParent()->isLinkerRelaxable())
 
  386 // Otherwise, check if the offset between the symbol and fragment is fully 
  387 // resolved, unaffected by linker-relaxable fragments (e.g. instructions or 
  388 // offset-affected FT_Align fragments). Complements the generic 
  389 // isSymbolRefDifferenceFullyResolvedImpl. 
  402 auto Fallback = [&]() {
 
  409 "relocatable SymA-SymB cannot have relocation specifier");
 
  410 std::pair<MCFixupKind, MCFixupKind> FK;
 
  420 // To handle the case of A - B which B is same section with the current, 
  421 // generate PCRel relocations is better than ADD/SUB relocation pair. 
  422 // We can resolve it as A - PC + PC - B. The A - PC will be resolved 
  423 // as a PCRel relocation, while PC - B will serve as the addend. 
  424 // If the linker relaxation is disabled, it can be done directly since 
  425 // PC - B is constant. Otherwise, we should evaluate whether PC - B 
  426 // is constant. If it can be resolved as PCRel, use Fallback which 
  427 // generates R_LARCH_{32,64}_PCREL relocation later. 
  428 if (&SecA != &SecB && &SecB == &SecCur &&
 
  429 isPCRelFixupResolved(
Target.getSubSym(), 
F))
 
  432 // In SecA == SecB case. If the section is not linker-relaxable, the 
  433 // FixedValue has already been calculated out in evaluateFixup, 
  434 // return true and avoid record relocations. 
  439 switch (
Fixup.getKind()) {
 
  462 Asm->getWriter().recordRelocation(
F, FA, 
A, FixedValueA);
 
  463 Asm->getWriter().recordRelocation(
F, FB, 
B, FixedValueB);
 
  464 FixedValue = FixedValueA - FixedValueB;
 
  468 // If linker relaxation is enabled and supported by the current relocation, 
  469 // generate a relocation and then append a RELAX. 
  470 if (
Fixup.isLinkerRelaxable())
 
  472 if (IsResolved && 
Fixup.isPCRel())
 
  473 IsResolved = isPCRelFixupResolved(
Target.getAddSym(), 
F);
 
  478 if (
Fixup.isLinkerRelaxable()) {
 
 
  487std::unique_ptr<MCObjectTargetWriter>
 
unsigned const MachineRegisterInfo * MRI
static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static std::pair< MCFixupKind, MCFixupKind > getRelocPairForSize(unsigned Size)
static void fixupLeb128(MCContext &Ctx, const MCFixup &Fixup, uint8_t *Data, uint64_t Value)
static void reportOutOfRangeError(MCContext &Ctx, SMLoc Loc, unsigned N)
PowerPC TLS Dynamic Call Fixup
bool relaxDwarfCFA(MCFragment &) const override
std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const override
bool addReloc(const MCFragment &, const MCFixup &, const MCValue &, uint64_t &FixedValue, bool IsResolved)
std::optional< MCFixupKind > getFixupKind(StringRef Name) const override
Map a relocation name used in .reloc to a fixup kind.
DenseMap< MCSection *, const MCSymbolRefExpr * > & getSecToAlignSym()
bool relaxDwarfLineAddr(MCFragment &) const override
LoongArchAsmBackend(const MCSubtargetInfo &STI, uint8_t OSABI, bool Is64Bit, const MCTargetOptions &Options)
bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const override
Write an (optimal) nop sequence of Count bytes to the given output.
void applyFixup(const MCFragment &, const MCFixup &, const MCValue &Target, uint8_t *Data, uint64_t Value, bool IsResolved) override
bool relaxAlign(MCFragment &F, unsigned &Size) override
std::pair< bool, bool > relaxLEB128(MCFragment &F, int64_t &Value) const override
MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
Generic interface to target specific assembler backends.
MCAsmBackend(llvm::endianness Endian)
virtual MCFixupKindInfo getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
MCContext & getContext() const
void maybeAddReloc(const MCFragment &, const MCFixup &, const MCValue &, uint64_t &Value, bool IsResolved)
Binary assembler expressions.
const MCExpr * getLHS() const
Get the left-hand side expression of the binary operator.
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx, SMLoc Loc=SMLoc())
const MCExpr * getRHS() const
Get the right-hand side expression of the binary operator.
static LLVM_ABI const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false, unsigned SizeInBytes=0)
Context object for machine code objects.
LLVM_ABI MCSymbol * createTempSymbol()
Create a temporary symbol with a unique name.
Base class for the full range of assembler expressions which are needed for parsing.
static LLVM_ABI bool evaluateSymbolicAdd(const MCAssembler *, bool, const MCValue &, const MCValue &, MCValue &)
LLVM_ABI bool evaluateKnownAbsolute(int64_t &Res, const MCAssembler &Asm) const
Aggressive variant of evaluateAsRelocatable when relocations are unavailable (e.g.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
static MCFixupKind getDataKindForSize(unsigned Size)
Return the generic fixup kind for a value with the given size.
static MCFixup create(uint32_t Offset, const MCExpr *Value, MCFixupKind Kind, bool PCRel=false)
Consider bit fields if we need more flags.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Instances of this class represent a uniqued identifier for a section in the current translation unit.
bool isLinkerRelaxable() const
MCSymbol * getBeginSymbol()
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
Represent a reference to a symbol from inside an expression.
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx, SMLoc Loc=SMLoc())
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
bool isInSection() const
isInSection - Check if this symbol is defined in some section (i.e., it is defined but not absolute).
void setFragment(MCFragment *F) const
Mark the symbol as defined in the fragment F.
MCSection & getSection() const
Get the section associated with a defined, non-absolute symbol.
MCFragment * getFragment() const
static MCValue get(const MCSymbol *SymA, const MCSymbol *SymB=nullptr, int64_t Val=0, uint32_t Specifier=0)
const MCSymbol * getSubSym() const
Represents a location in source code.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
A switch()-like statement whose cases are string literals.
StringSwitch & Case(StringLiteral S, T Value)
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
The instances of the Type class are immutable: once they are created, they are never changed.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & write_zeros(unsigned NumZeros)
write_zeros - Insert 'NumZeros' nulls.
uint64_t tell() const
tell - Return the current offset with the file.
raw_ostream & write(unsigned char C)
A raw_ostream that writes to an SmallVector or SmallString.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ C
The default llvm calling convention, compatible with C.
@ fixup_loongarch_abs64_hi12
@ fixup_loongarch_abs_hi20
@ fixup_loongarch_abs_lo12
@ fixup_loongarch_abs64_lo20
bool isRelocation(MCFixupKind FixupKind)
void write(void *memory, value_type value, endianness endian)
Write a value to memory with a particular endianness.
This is an optimization pass for GlobalISel generic memory operations.
std::unique_ptr< MCObjectTargetWriter > createLoongArchELFObjectWriter(uint8_t OSABI, bool Is64Bit)
constexpr bool isInt(int64_t x)
Checks if an integer fits into the given bit width.
constexpr int64_t minIntN(int64_t N)
Gets the minimum value for a N-bit signed integer.
constexpr bool isUIntN(unsigned N, uint64_t x)
Checks if an unsigned integer fits into the given (dynamic) bit width.
uint16_t MCFixupKind
Extensible enumeration to represent the type of a fixup.
MCAsmBackend * createLoongArchAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
FunctionAddr VTableAddr Count
constexpr bool isUInt(uint64_t x)
Checks if an unsigned integer fits into the given bit width.
@ FirstLiteralRelocationKind
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_1
A one-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_Data_leb128
A leb128 fixup.
@ FK_Data_2
A two-byte fixup.
FunctionAddr VTableAddr uintptr_t uintptr_t Data
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
constexpr int64_t maxIntN(int64_t N)
Gets the maximum value for a N-bit signed integer.
unsigned encodeSLEB128(int64_t Value, raw_ostream &OS, unsigned PadTo=0)
Utility function to encode a SLEB128 value to an output stream.
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
unsigned Log2(Align A)
Returns the log2 of the alignment.
Target independent information on a fixup kind.