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vedic-partap/Computer-Organization-and-Architecture-LAB

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Computer Organization and Architecture

Assignments

  • Assignment-1: MIPS Programming
  • Assignment-2: MIPS-32 Programming
  • Assignment-3: Combinational Circuit Design in Verilog for FPGA Platform
  • Assignment-4: Adder Design on FPGA
  • Assignment-5: Multiplier Design on FPGA
  • Assignment-6: FSM Design using Verilog
  • Assignment-7: Verilog Design of a Single-cycle RISC ISA

Author

Vedic Partap

For any queries contact me at vedicpartap1999@gmail.com

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Solution to COA LAB Assgn, IIT Kharagpur

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