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timm bits #804

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timm bits #804

rwightman wants to merge 101 commits into main from bits_and_tpu

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@rwightman rwightman commented Aug 13, 2021

The branch associated with this PR is for development of timm bits -- a significant update and reorganizaiton of timm's training scripts and associated modules. It works w/ TPUs (PyTorch XLA) and GPUs (PyTorch) and possibly DeepSpeed.

This PR is still a long ways from being merged. Having the branch as a PR helps w/ visibility of the ongoing work.

Jasha10, dedeswim, alleniver, Dreamer312, ternaus, and Smartappli reacted with thumbs up emoji Smartappli reacted with heart emoji Smartappli reacted with rocket emoji nateraw, LaVieEnRoseSMZ, hiyyg, Jasha10, nhannguyen2709, sramroach, and alleniver reacted with eyes emoji
rwightman and others added 30 commits April 20, 2021 17:15
...step closure used, metrics base impl w/ distributed reduce, many tweaks/fixes.
...h XLA usage on TPU-VM. Add some FIXMEs and fold train_cfg into train_state by default.
... XLA (pushing into transforms), revamp of transform/preproc config, etc ongoing...
rwightman and others added 29 commits February 28, 2022 16:33
...ers more similar. Fix workers=0 compatibility. Add ImageNet22k/12k synset defs.
Add support for different TFDS `BuilderConfig`s
Fix issue with `torchvision`'s `ImageNet`
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is this still in progress ?

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