Welcome to the complete codebase of the Frame hardware. For regular usage, check out the docs here.

The codebase is split into three sections. The nRF52 Application, the nRF52 Bootloader, and the FPGA RTL.

The nRF52 is designed to handle the overall system operation. It runs Lua, as well as handles Bluetooth networking, AI tasks and power management. The FPGA meanwhile, simply handles acceleration of the graphics and camera.

Frame system architecture diagram

1. Ensure you have the ARM GCC Toolchain installed.

2. Ensure you have the nRF Command Line Tools installed.

3. Ensure you have nRF Util installed, along with the device and nrf5sdk-tools subcommands.

   ./nrfutil install device
   ./nrfutil install nrf5sdk-tools

4. Clone this repository and initialize any submodules:

   git clone https://github.com/brilliantlabsAR/frame-codebase.git
   cd frame-codebase
   git submodule update --init

5. You should now be able to build and flash the project to an nRF52840 DK by calling the following commands from the frame-codebase folder.

   make release
   make erase-jlink # Unlocks the flash protection if needed
   make flash-jlink

1. Open the project in VSCode.

   There are some build tasks already configured within .vscode/tasks.json. Access them by pressing Ctrl-Shift-P (Cmd-Shift-P on MacOS) → Tasks: Run Task.

   Try running the Build task. The project should build normally.

   You may need to unlock the device by using the Erase task before programming or debugging.

2. To enable IntelliSense, be sure to select the correct compiler from within VSCode. Ctrl-Shift-P (Cmd-Shift-P on MacOS) → C/C++: Select IntelliSense Configuration → Use arm-none-eabi-gcc.

3. Install the Cortex-Debug extension for VSCode in order to enable debugging.

4. A debugging launch is already configured within .vscode/launch.json. Run the Application (J-Link) launch configuration from the Run and Debug panel, or press F5. The project will automatically build and flash before launching.

5. To monitor the logs, run the task RTT Console (J-Link) and ensure the Application (J-Link) launch configuration is running.

6. To debug using Black Magic Probes, follow the instructions here.

The complete FPGA architecture is described in the documentation here.

The FPGA RTL is prebuilt and included in fpga_application.h for convenience. If you wish to modify the FPGA RTL, follow the instructions here.