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The idea is to combine these two principles together.

If we use zero-address instructions in a CPU, this implies having a stack memory. However, the idea of Von Neumann architecture is to store both data and instructions in the same place.

This means that PC is replaced with ESP, the stack pointer, which points to the top of the stack. The instruction that is to be executed is the one on the top of the stack, always. It is decoded, removed from the stack, and then executed. This means that we have to mix both data and instructions between each other, and we have to introduce some sort of additional flag or bit to each cell to differentiate between a "data" memory block and an "instruction".

Is that architecture possible or the ideas contradict each other?

asked Nov 11 at 9:03
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  • $\begingroup$ At the very least, you would have to allow having more than one stack, otherwise the capabilities of the machine (at least abstractly, ignoring memory limitations etc.) drop from being Turing complete to a DPDA. $\endgroup$ Commented Nov 11 at 10:28

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