Showing posts with label brain computer interfaces. Show all posts
Showing posts with label brain computer interfaces. Show all posts

Thursday, November 6, 2014

What is ‘SETUP and HOLD’ time concept?


Gates is referred as the basic building blocks of combinational logic circuits. However there are XOR, NAND, NOR, XNOR gates too but particularly AND, OR, and NOT gates are used. Similarly, Flip flops are referred as the basic building blocks of sequential circuits. Flip flops are clock based devices. One bit is stored by each flip flop.

There are restrictive time regions around the clock for every flip flop. Input should not change in these time regions. These regions are called restrictive because by changing the input in this region the output is not sure, it may or may not be the one you expected.

Output is derived from either the new input, the old input, or may be in between these two. The two most important terms in the digital clocking are defined below.
Setup and hold time.
  • The setup time is the time interval just before the clock where the data must be remain stable. Other definition is, “SETUP time is the minimum time before the clock's active edge that the data must be stable to be latched correctly in this period of time. It may cause incorrect data to be captured, if there is any violation, which is known as setup time violation.
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  • The hold time is the time interval after the clock where the data must be remain stable. It may cause incorrect data to be latched if there is any violation, which is known as ahold time violation.

  • Remedies for setup time violation:
    • Optimize the combinational logic between the flip-flops to get minimum delay.
    • To get lesser setup time, redesign the flip-flops.
    • Play with clock skew (useful skews).


    Remedies for hold time violation
    :
Use buffers to add delays
.• lockup-latches can be added (basically to avoid data slip).


Author - Poornima Sharma
(Intern Design Engineer)

Thursday, October 30, 2014

Understanding the process of Image Segmentation

Image segmentation is the process in which we do portioning of digital image into multiple segments. We convert the image information into more meaningful and easy to analyze data. Segmentation is not so easy in image processing and it is still in research.

In image segmentation we extract the information from the image. We use segmentation in object detection and feature extraction, in this we firstly do the edge segmentation.

Edge segmentation is the process in which when the intensity changes abruptly it can create edges in an image. Second we use segmentation by Thresholding, in thresholding process we use grey scale image and composed dark intensity image on light background.

Image segmentation





Thresholding is the way to separate out your information from image and it easy to analyze. We use histogram, histogram is the technique improving the contrast of an image for thresholding.

It is the common step of image processing when we are going to do recognition, object detection, region estimation, feature extraction.

Whenever we do segmentation our goal is to extract the information clearly because we want the information easy to analyse and understand.


Author - Rahul Bhardwaj
(Research Associate at Silicon Mentor)

Wednesday, October 8, 2014

Algorithm to Hardware


Algorithm development starts in MATLAB, Lab-view, C and JAVA which uses complex floating point arithmetic.These algorithms are then transferred to hardware implementation team. Then the hardware design team implements this abstract algorithm on the specific hardware that meets the system level specifications. However, it is very difficult to achieve system-level constraints because most of the algorithms contain complex data structure and loops which costs to power consumption and memory usage for particular application.

The point to be noted

Most of the algorithm developers usually ignore number representation e.g. algorithm from MATLAB to C using floating point which provides high precision and huge dynamic range. These floating point representations contain two types of data type, one is single precision and other is double precision. In single precision, significant data is represented in 23 bit and exponent is represented by 8 bit. However, double contains 52 bit of significant data and 11 bit for exponent.

Algorithm developers use floating point to get the more and more precise results. They don’t worry about significant bit left after whole operation, which may become critical for implantation engineer.


Hardware understanding:

When any design is implemented using intensive numeric operation, it is hard to adapt algorithm for hardware implementation or takes a long time in development process. Sometimes, the results obtained are different from design specification.
So, before you start, it is necessary to be attentive about resources, cost, target device and risk at early stage of the design.A algorithm designer shouldtake an account about the hardware specification given for a particular design, so, it is better to know whether given hardware supports floating point data types or not.

If there is a need to convert floating to fixed point data types, it requires considerably more time and some special skills. It is too intensive job when there is a need to convert the double precision to single precision as that of fixed point conversion.


HDL conversion for Hardware implementation:

When algorithm designer is done with the algorithm then it goes to the design implementation team. There, they read the specification and numeric operation used in given algorithm.

Implementation engineer firstly look after target hardware specification they had been given. If they found that data types (floating or fixed) used in this particular algorithm don’t support in target hardware they request for the revision of algorithm.

There are many automated tools which convert MATLAB and Simulink models into HDL like HDL coder from MATLAB itself converts system level algorithm into synthesizable code, System generator from Xilinx which is more suitable when you are targeting Xilinx hardware.



Design optimization:

This is final and most important task in the journey of system level algorithm to real time hardware implementation. In real scenario there are many issues like speed, cost and power. When we are implementing our algorithm for floating point it may consume more power and may be low in speed relatively.

There are several techniques to optimize the design. Firstly, algorithm design team must write a simple algorithm avoiding intensive loop and large data types.

A well-defined pipelined architecture manages speed and power consumption.

Critical data path, custom data path width, signals and power gating also helps to get better performance at low cost.

While optimizing your design you should take care of initial results and results you get after optimizing the design. Bit error should be low.



Author - Varinder josan
(Ceo at Silicon Mentor)

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