Conditional Compilation in Makefile

Question

I currently have a make file, part of which looks like the following.

####################################################################
# Files #
####################################################################
C_SRC += \
CMSIS/CM3/CoreSupport/core_cm3.c \
CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/system_efm32.c \
efm32lib/src/efm32_assert.c \
efm32lib/src/efm32_system.c \
efm32lib/src/efm32_gpio.c \
efm32lib/src/efm32_cmu.c \
efm32lib/src/efm32_usart.c \
efm32lib/src/efm32_i2c.c \
efm32lib/src/efm32_dma.c \
efm32lib/src/efm32_timer.c \
efm32lib/src/efm32_int.c \
efm32lib/src/efm32_emu.c \
efm32lib/src/efm32_adc.c \
efm32lib/src/efm32_rtc.c \
radio.c \
led.c \
trace.c \
 main.c
S_SRC += \
CMSIS/CM3/DeviceSupport/EnergyMicro/EFM32/startup/cs3/startup_efm32.s
####################################################################
# Rules #
####################################################################
C_FILES = $(notdir $(C_SRC) )
S_FILES = $(notdir $(S_SRC) )
#make list of source paths, sort also removes duplicates
C_PATHS = $(sort $(dir $(C_SRC) ) )
S_PATHS = $(sort $(dir $(S_SRC) ) )
C_OBJS = $(addprefix $(OBJ_DIR)/, $(C_FILES:.c=.o))
S_OBJS = $(addprefix $(OBJ_DIR)/, $(S_FILES:.s=.o))
C_DEPS = $(addprefix $(OBJ_DIR)/, $(C_FILES:.c=.d))
vpath %.c $(C_PATHS)
vpath %.s $(S_PATHS)
# Default build is debug build
all: debug
debug: CFLAGS += -DDEBUG -O0 -g3
debug: $(OBJ_DIR) $(LST_DIR) $(EXE_DIR) $(EXE_DIR)/$(PROJECTNAME).bin
release: CFLAGS += -DNDEBUG -O3
release: $(OBJ_DIR) $(LST_DIR) $(EXE_DIR) $(EXE_DIR)/$(PROJECTNAME).bin
base: CFLAGS += -DDEBUG -O0 -g3
base: $(OBJ_DIR) $(LST_DIR) $(EXE_DIR) $(EXE_DIR)/$(PROJECTNAME).bin

Essentially what I want to do is if it is run with the base target then I want to change the main.c file in C_SRC with mainbase.c

I have tried for hours and hours now and have gotten no where with it. Any advice?

Thanks!

• Beta: There is a simpler way, but you haven't shown us the rest of the rules, the actual recipes that build things.

Answer 1

If you are using GNU make then you can use directives such as if and similar.

See Conditional Parts of Makefiles in the documentation.

If you case you could do it like this:

C_SRC += \
CMSIS/CM3/CoreSupport/core_cm3.c \
....
led.c \
trace.c
ifeq ($(SPECIAL),"")
C_SRC += main.c
else
C_SRC += main_special.c
endif

The when calling make on the command line, if you set the variable SPECIAL then the file main_special.c will be used, otherwise main.c will be used.

Command line for using main_special.c:

$ make SPECIAL=1

• arapEST: With the current version of Make you need parentheses. ifeq ($(SPECIAL),"")