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F2FS的学习笔记以及源码分析。这个github的分析都是初版,CSDN的版本是经过修改的,应该逻辑更为通畅,建议去CSDN进行阅读,连接如下。

227 71 Updated Jun 25, 2021

An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model

C++ 530 164 Updated Jun 25, 2024

Main Web Site (Online Books)

HTML 10,159 978 Updated Jan 1, 2026

OpenGLES 3.0从零开始,绘制点、线、三角形、立方体,相机实时预览等等实践学习

Java 714 202 Updated Oct 30, 2022

Main page

Emacs Lisp 129 23 Updated Feb 12, 2020

RiscyOO: RISC-V Out-of-Order Processor

Bluespec 170 29 Updated Jul 3, 2020

AI education materials for Chinese students, teachers and IT professionals.

HTML 14,047 2,956 Updated May 16, 2024

RSD: RISC-V Out-of-Order Superscalar Processor

SystemVerilog 1,149 114 Updated Dec 25, 2025

32-bit Superscalar RISC-V CPU

Verilog 1,180 200 Updated Sep 18, 2021

Interactive HTML BOM generation plugin for KiCad, EasyEDA, Eagle, Fusion360 and Allegro PCB designer

Python 4,303 546 Updated Jan 11, 2026

Jianchang Constructed Hardware Description Library

Java 1 2 Updated Nov 20, 2018
C++ 38 13 Updated Jun 3, 2024

Embedded Dsp processor

Verilog 3 3 Updated Oct 23, 2014

Digital Interpolation Techniques Applied to Digital Signal Processing

Verilog 67 13 Updated Jun 24, 2024

CompArch Final Project: DSP Architecture

Verilog 9 4 Updated Dec 12, 2018

RTL Verilog library for various DSP modules

Verilog 94 35 Updated Feb 17, 2022

A collection of demonstration digital filters

Verilog 166 38 Updated Jan 18, 2024

Think DSP: Digital Signal Processing in Python, by Allen B. Downey.

Jupyter Notebook 4,456 3,493 Updated Feb 13, 2026

Silicon-validated SoC implementation of the PicoSoc/PicoRV32

Verilog 285 75 Updated Jul 28, 2020

Lantern官方版本下载 蓝灯 翻墙 代理 科学上网 外网 加速器 梯子 路由 proxy vpn circumvention gfw

17,550 2,981 Updated Apr 18, 2022

Development version of the Upstream MultiPath TCP Linux kernel 🐧

C 392 54 Updated Feb 16, 2026

我的超迷你机械臂机器人项目。

C 14,555 3,066 Updated Mar 14, 2024

A collection of Master XDC files for Digilent FPGA and Zynq boards.

Tcl 653 585 Updated Nov 12, 2024

image processing based FPGA

VHDL 117 29 Updated Sep 2, 2021

浙江大学课程攻略共享计划

HTML 40,223 9,606 Updated Jan 20, 2026

Spector: An OpenCL FPGA Benchmark Suite

Shell 49 18 Updated Feb 2, 2019

The RIFFA development repository

Verilog 864 347 Updated Jun 11, 2024

A simple GPU on a TinyFPGA BX

Verilog 81 16 Updated Sep 3, 2018

10x faster matrix and vector operations

C++ 2,517 174 Updated Oct 12, 2022
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