[DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
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Updated
May 11, 2026 - Verilog
[DATE 2022] PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs
A high-performance C++20 cache simulator with power/area modeling, MESI coherence, prefetching, and multi-level hierarchy support for architecture research and education.
A dynamic web-based tool for visualizing and interacting with Wye (Y) and Delta (Δ) power system configurations. Built using Flask, Python, and Tailwind CSS.
gem5 power/area modeling toolkit: wires native power models into Minor CPU + Ruby + Garnet simulations, plus DSENT (NoC) and Cacti (cache) post-hoc analysis scripts for any m5out/ run.
Superscalar pipeline simulator features out-of-order execution, MSHR-based cache, and cycle-accurate power modeling.
Curated list of research, datasets, tools, simulators & patents for AI data center (AIDC) power & energy modeling — GPU die → VRM → PSU → rack → site → grid.
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