page-table

📘 Explore the intricacies of virtual memory management! 🚀 This repo provides comprehensive guides and insights into page tables, address mapping, multi-level paging, and more! Ideal for OS enthusiasts and computer science students.🧠💻

memory-management memory-allocation virtual-memory paging physical-memory memory-fragmentation memory-allocation-deallocation page-table address-mapping multi-level-paging

• Updated Oct 9, 2023

Parameterizable 32-bit Memory Management Unit (MMU) designed in Verilog HDL featuring virtual memory translation, TLB-based address lookup, ASID-aware translation, Page Table Walker (PTW), permission checking, page and execute fault handling, self-checking verification testbenches & comprehensive waveform verification using Icarus Verilog & GTKwave

fpga riscv verilog memory-management virtual-memory computer-architecture mmu gtkwave vlsi verilog-hdl tlb iverilog semiconductor digital-design ptw cpu-design asic-design rtl-design hardware-design page-table

• Updated Jun 20, 2026
• Verilog

This repository contains an implementation of a multi-level page table, written entirely in C. The project includes functionalities for memory management and address translation, demonstrating concepts of virtual memory and efficient handling of large address spaces in operating systems.

c page-table

• Updated Jan 1, 2025
• C