Releases: ruvnet/RuVector

@ruvector/rvagent-wasm 0.2.0

28 May 02:45

@ruvnet ruvnet

rvagent-wasm-v0.2.0

a529d51

@ruvector/rvagent-wasm 0.2.0 Latest

Latest

@ruvector/rvagent-wasm 0.2.0

Changes from 0.1.0

Documentation + metadata release. No Rust changes.

Corrected npm package name: @ruvector/rvagent-wasm (previously README showed unscoped rvagent-wasm)
Corrected build target documentation: nodejs (not web) for @claude-flow/cli usage
Added JsModelProvider + addMcpTools() integration patterns (ruflo ADR-129 Gaps 1 & 2)
Added WasmGallery direct API examples
Added CHANGELOG.md
Added .github/workflows/publish-rvagent-wasm.yml for npm publish via CI

ADR-129 context

All gap APIs were already present in 0.1.0:

Gap 1 (JsModelProvider / set_model_provider): WASM API complete — wiring gap is in ruflo's agent-wasm.ts
Gap 2 (addMcpTools): WASM API complete — wiring gap is in ruflo's buildRvfContainer
Gap 3 (get_state, get_todos, reset): WASM API complete — MCP tools missing in ruflo
Gap 4 (full WasmGallery surface): WASM API complete — MCP tools missing in ruflo

See ADR-129 for the ruflo-side fix plan.

Compatible with

@claude-flow/cli >= 3.10.4
wasm-pack 0.14.x, 0.15.x
Rust 1.80+

Installing

npm install @ruvector/rvagent-wasm@0.2.0

PR

#512

Assets 2

ruvllm_sparse_attention v0.1.1 — FastGRNN-gated near-linear attention + no_std/ESP32-S3

07 May 15:14

@ruvnet ruvnet

ruvllm_sparse_attention-v0.1.1

42021ba

ruvllm_sparse_attention v0.1.1 — FastGRNN-gated near-linear attention + no_std/ESP32-S3

What's new

ruvllm_sparse_attention v0.1.1 is the first release that runs on bare-metal ESP32-class hardware and drops attention's per-token cost from O(N log N) to near-linear O(N) via a FastGRNN salience gate.

📦 crates.io · 📚 docs.rs · 🧪 tutorial gist · 📋 PR #429

Highlights

FastGrnnGate + forward_gated (new public API) — recurrent O(N · D_h2) salience pass + gated attention forward. Combined cost O(N · (D_h2 + W + G + K_keep + dim)) is linear in seq when K_keep is constant. Critical invariant: forward_gated with all-true mask is bit-identical to forward.
no_std + alloc support (ADR-192) — new std feature default-on, so existing consumers see zero behavioural change. Bare-metal targets opt out via default-features = false. Verified on attached ESP32-S3 (Xtensa LX7 @ 240 MHz, 16 MB flash) — release build 1.02 s, 376 KB rlib.
ADR-191 (proposed) — Pi Zero 2W production hardening: decode-deadline API, warm-up hook, pi_zero_2w() config preset.
Plain-language README with FAQ, scaling table, and SEO keywords. New end-to-end tutorial.
libm 0.2 added as always-on dep (~60 KB pure Rust). Restores f32::exp/sqrt/tanh/powi method syntax in no_std mode via an F32Ext trait — all 46 math call sites unchanged.

Verification matrix

Build	Result
`cargo test --lib`	38/38 pass
`cargo build --no-default-features`	clean
`cargo build --no-default-features --features fp16`	clean
`cargo +esp build --release --target xtensa-esp32s3-none-elf -Z build-std=core,alloc`	clean (1.02 s, 376 KB rlib)
Native run of `examples/esp32s3_smoke`	`esp32s3_smoke: all checks passed`

Migration

Zero action for std consumers — std is the default feature. New no_std consumers (ESP32 / Cortex-M / RISC-V MCU):

ruvllm_sparse_attention = { version = "0.1.1", default-features = false, features = ["fp16"] }

Bring your own allocator + panic handler + #[entry] (embedded-alloc, linked_list_allocator, esp-hal, xtensa-lx-rt).

What's next

ADR-191 implementation (decode-deadline API, warm-up hook, Pi Zero 2W preset)
Flash-able example app crate (embedded-alloc + esp-hal scaffolding around examples/esp32s3_smoke.rs)

Assets 2

ruvllm Pi 5 cluster v1.0.0 (ADR-179, iter 28)

05 May 12:37

@ruvnet ruvnet

ruvllm-pi-cluster-v1.0.0-iter28

c6d6900

This commit was created on GitHub.com and signed with GitHub’s verified signature.

GPG key ID: B5690EEEBB952194

Verified

Learn about vigilant mode.

ruvllm Pi 5 cluster v1.0.0 (ADR-179, iter 28)

ADR-179 / 28-iteration /loop ships the first multi-Pi LLM cluster in this repo.

Headline

SOTA: 20.5 tok/s aggregate on TinyLlama-1.1B Q4_K_M across ×ばつ Pi 5 + AI HAT+. ×ばつ over iter-13 single-Pi fp16 baseline. Total cluster power ~28 W. Hardware ~400ドル.

What ships

New ruvllm-pi-worker bin in ruvector-hailo-cluster (sibling to ruvector-hailo-worker from ADR-167)
aarch64 cross-build chain — rustls-tls swap on hf-hub, Cortex-A76 +lse +rcpc +fp16 +crc rustflags
New hub-download cargo feature on ruvllm — gates HF Hub auto-download behind opt-in (default-on for workstation, off for cross-builds)
deploy/ruvllm-pi-worker.{service,env.example} + install-ruvllm-pi-worker.sh
deploy/ruvllm-cluster-smoke.sh — parallel cluster bench harness
crates/ruvector-hailo-cluster/RUVLLM_CLUSTER_PLAN.md — full 28-iter log
4 new ADRs: 179 (this work), 180/181/182 (next-phase scoping)

Cluster topology

Node	Tailnet IP	:50051 (embed)	:50053 (LLM)
cognitum-v0	100.77.59.83	✓	✓
cognitum-cluster-1	100.80.54.16	✓	✓
cognitum-cluster-2	100.77.220.24	✓	✓
cognitum-cluster-3	100.73.75.53	✓	✓

Convergence trajectory

Iter	Quant	nPi	tok/s/Pi	Aggregate	vs base
13	fp16	1	2.9	2.6	×ばつ
23	fp16	3	2.9	8.7	×ばつ
24	Q4_K_M	1	9.0	9.0	×ばつ
26	Q4_K_M	4	5.1	20.5	×ばつ
27	Q3_K_S/Q2_K	1	7.9	strike 1
28	multi-inflight	1	7.0	strike 2 → converged

Crates published

ruvllm 2.2.0 → crates.io
ruvllm-cli 2.2.0 → crates.io (new on registry)

Out of scope (next ADRs)

ADR-180 ServingEngine continuous batching wiring (×ばつ projected, ~50-80 tok/s aggregate target)
ADR-181 in-tree pi_quant + BitNet b1.58 (×ばつ projected, ~80-100 tok/s target)
ADR-182 Hailo-10H hardware migration (×ばつ projected, ~150-300 tok/s target)

Assets 2

ruvector-hailo backend v0.2.0 (iter 227)

04 May 03:44

@ruvnet ruvnet

hailo-backend-v0.2.0-iter227

910efaa

ruvector-hailo backend v0.2.0 (iter 227)

Branch hailo-backend snapshot at iter 227. NPU acceleration is the production default since iter 163.

Performance (cognitum-v0, Pi 5 + AI HAT+, c=4 b=1)

Metric	Value
Throughput	~70 embeds/sec/worker
p50 latency	55-57 ms
p99 latency	86-90 ms (best clean runs)
vs cpu-fallback	×ばつ
NPU-bound ceiling	confirmed at ~70.6/sec (iter-179 saturation sweep)

Two arcs since v0.1.0-iter156b

Arc 1 — Security / hardening (iters 174-213)

Eight-layer DoS gate stack on the gRPC worker, all env-tunable:

Iter	Gate	Default
180	`RUVECTOR_MAX_REQUEST_BYTES`	64 KB
181	`RUVECTOR_MAX_CONCURRENT_STREAMS`	256
182	`RUVECTOR_REQUEST_TIMEOUT_SECS`	30
183	CVE-2023-44487 rapid-reset cap	32
184	`RUVECTOR_HTTP2_KEEPALIVE_SECS`	60
190	`RUVECTOR_MAX_RESPONSE_BYTES`	16 KB
199	`RUVECTOR_MAX_BATCH_SIZE`	256
200	Per-item rate-limit debit on streams	per-item

Plus iter-174 HEF sha256 pin, iter-185 shutdown SEGV fix (5/5 SEGV → 10/10 clean), iter-191 HailoRT FFI 2s timeout, iter-209 retry short-circuit on terminal errors, iters 210-213 OOM-bounded operator-path file reads, iters 187-189 client TLS flag plumbing.

Arc 2 — ADR-178 integration gap analysis (iters 215-227)

Goal-planner agent produced ADR-178 (459 lines) identifying 8 gaps; 6 closed:

Gap	Severity	Iter	Status
A	HIGH	215	✅ ruvllm-bridge deploy artifacts
B	HIGH	218 + 219	✅ `EmbeddingProvider` impl + workspace rejoin
C	MEDIUM	220	✅ short-term (csi-bridge docs disambiguation)
D	MEDIUM	221	✅ short-term (`hailo-cluster-as-provider` example)
E	MEDIUM	219	✅ folded into B
F	MEDIUM	217	✅ ADR-167 stale stratigraphy collapsed
G	LOW	—	hardware-bound (Pi 4)
H	LOW	216	✅ install-bridge.sh → install-mmwave-bridge.sh

Plus three iter-219 follow-up side effects all caught + fixed (iters 224, 226, 227).

Verification

cargo build --workspace --release: clean (3m49s)
cargo check --workspace: clean
Cluster lib + integration tests --features tls --test-threads=1: 23 suites, all green; 120 lib tests
hailo lib tests: 21 default + 22 cpu-fallback + 7 tokenizer pass
cargo deny check on both hailo crates: advisories/bans/licenses/sources OK
cargo audit --deny warnings with iter-224 ignores: exit 0
Pi cognitum-v0 deployed + bit-identical embed verified
(vec_head=0.0181,-0.0220,0.0451,0.0159 unchanged)

Companion artifacts

ADR-178 (gap analysis): docs/adr/ADR-178-ruvector-ruview-hailo-integration-gap-analysis.md
ADR-167 (master ADR, iter-217 collapse): docs/adr/ADR-167-ruvector-hailo-npu-embedding-backend.md
HEF binary (compatible — unchanged from v0.1.0-iter156b): hailo-encoder-v0.1.0-iter156b

🤖 Generated with claude-flow

Assets 2

Hailo-8 encoder HEF — all-MiniLM-L6-v2 (iter 156b)

03 May 20:35

@ruvnet ruvnet

hailo-encoder-v0.1.0-iter156b

cc490f7

Hailo-8 encoder HEF — all-MiniLM-L6-v2 (iter 156b)

First-known compiled .hef for sentence-transformers/all-MiniLM-L6-v2
on the Hailo-8 NPU (Pi 5 + AI HAT+ target).

Artifact

File: encoder.hef
Size: 15,758,361 bytes (~15 MB)
sha256: cdbc892765d3099f74723ee6c28ab3f0daade2358827823ba08d2969b07ebd40
DFC: v3.33.0
Hardware: hailo8

Architecture

Single-input encoder block: takes pre-computed FP32 hidden states
[1, 128, 384], returns post-encoder FP32 [1, 128, 384]. Input
embedding lookup (word + position + token_type + LayerNorm) is
handled host-side via candle's BertEmbeddings reimplementation
in crates/ruvector-hailo/src/host_embeddings.rs. Post-NPU
mean-pool + L2-normalize handled in inference.rs.

How to use

bash crates/ruvector-hailo-cluster/deploy/download-encoder-hef.sh \
 /var/lib/ruvector-hailo/models/all-minilm-l6-v2
# Then build worker with:
cargo build --release --features hailo,cpu-fallback \
 --bin ruvector-hailo-worker \
 --manifest-path crates/ruvector-hailo-cluster/Cargo.toml

Performance

Measured on cognitum-v0 (Pi 5 + AI HAT+) via cluster-bench at
concurrency=4:

Metric	Value	vs cpu-fallback
throughput	67.3 / sec	×ばつ
p50 latency	57 ms	×ばつ
p99 latency	152 ms	×ばつ
cache hit (in-process)	15.86 M / sec	×ばつ

Build provenance

Compiled iter 156b (commit ffa3e90a6 on branch hailo-backend).
The four Hailo Dataflow Compiler v3.33 SDK bugs that blocked
transformer-encoder compilation are documented in ADR-167 + ADR-175,
all worked around from user-space:

KeyError on internal layer name → calibration dict keying
AccelerasValueError shape mismatch → NCHW reshape
ElementwiseAddDirectOp Keras deserialize → acceleras Layer
register_keras_serializable monkey-patch (the breakthrough)
tf_rgb_to_hailo_rgb align → single-input encoder form

See crates/ruvector-hailo-cluster/deploy/compile-encoder-hef.py
to rebuild from source against your own corpus.

Note on accuracy vs cpu-fallback

The single-input HEF runs full encoder attention with no padding
mask. cpu-fallback's BertModel.forward applies the real mask, so
the two embedders produce vectors in different spaces (cosine ~0.44
between matching texts). Both internally preserve semantic ordering
(sim(close) > sim(far) Δ=+0.23). The cluster's iter-143 fingerprint
separates HEF and cpu-fallback workers automatically so they never
mix in dispatch. A mask-aware HEF compile is documented as future
work in ADR-175.

Assets 3

1 person reacted

ruvllm-esp32 v0.3.0-rc2 — Tiny RuvLLM Agents on Heterogeneous ESP32 SoCs

30 Apr 17:55

@github-actions github-actions

ruvllm-esp32-v0.3.0-rc2

63e0d78

ruvllm-esp32 v0.3.0-rc2 — Tiny RuvLLM Agents on Heterogeneous ESP32 SoCs

The first ruvllm-esp32 release that actually ships firmware. Five .bin artifacts, one per ESP32 variant, all booting real silicon, all 5 G6 acceptance gates green.

See ADR-165 for the architecture decision and ADR-166 for the cross-compile/bring-up operations manual.

1. Introduction

This release ships firmware that turns any ESP32 dev board into one specialist node in a small AI cluster. Five chips, five jobs, a few dollars each, and they talk to one another over the wires.

What's actually on each chip

A single tiny program written in Rust that, on boot, picks a role based on the chip you flashed it to and then handles a few simple commands you send over the USB-Serial port. Pick whatever roles fit your project and wire the chips together over UART / SPI / WiFi (ESP-NOW). Each chip is doing one job well, not everything badly.

Chip	What it's for, in one sentence
ESP32-C3 (2ドル)	"Remember these snippets and find me the closest match" — a tiny vector search index.
ESP32 (3ドル)	"Look up an answer from a small knowledge base" — retrieval-augmented Q&A.
ESP32-S2 (3ドル)	"Tell me when something looks weird" — anomaly detector for sensor or text streams.
ESP32-C6 (3ドル)	"Remember facts, events, and preferences with timestamps" — type-tagged semantic memory.
ESP32-S3 (4ドル)	"Adapt on-device" or "draft tokens fast" — micro-fine-tuning + speculative-decoding helper.

Send a command like add hello world, search hello, recall sensor, learn benign reading, or check weird payload over /dev/ttyACM0 at 115200 baud and the chip does the work locally. No cloud, no API key, no internet required. The whole agent fits in ~430 KB of flash.

Why this matters

Privacy — every byte stays on the device
Latency — local k-NN / recall / anomaly check in under 10 ms
Cost — runs on 2ドル–4ドル hardware
Offline — works in a faraday cage if you want it to
Composable — chips federate over their existing buses, so a project can grow from one chip to eight without rewriting anything

What this release is NOT

This is not a transformer LLM crammed into 4 KB of SRAM. The previous version of this example claimed that and it didn't work — issue #409 is the receipt. Real on-device language-model inference belongs on chips with external PSRAM (ESP32-P4, 8 MB) and is tracked separately. What you're getting here is the federation-ready primitive layer — vector search, retrieval, memory, anomaly, micro-LoRA — which a P4 chip can join later as the "draft a sentence" node without changing any of the wires.

2. Features

Tiny-agent role catalog (ADR-165 §2.1)

Role	Default variant	Primitives used	Federation traffic
HnswIndexer	ESP32-C3	`MicroHNSW<128, 256>` + `HashEmbedder`	inbound: `add(text)`; outbound: `kNN(query, k)`
RagRetriever	ESP32	`MicroRAG` + `MicroHNSW` + `HashEmbedder`	inbound: `recall(query)`; outbound: top-k entries
AnomalySentinel	ESP32-S2	`AnomalyDetector`	streams `AnomalyResult` events
MemoryArchivist	ESP32-C6	`SemanticMemory` (type-tagged)	inbound: `remember(type, text)`; outbound: `recall_by_type`
LoraAdapter	ESP32-S3 (SIMD)	`MicroLoRA` rank 1–2, `LoRAStack`	rank-1 deltas in / adapted activations out
SpeculativeDrafter	ESP32-S3	`SpeculativeDecoder` w/ `DraftVerifyConfig::for_five_chips`	drafts → broadcast; consumes `VerifyResult`
PipelineRelay	any	`PipelineNode { Head/Middle/Tail }`	passes activations along the chain

Primitive surface (`lib.rs`)

Category	What ships
Vector search	`MicroHNSW<DIM, CAPACITY>` over INT8 vectors
Quantization	`BinaryVector<N>` (×ばつ compress), `ProductQuantizer<M,K,D>` (×ばつ)
Adaptation	`MicroLoRA` rank 1–2, `LoRAStack<NUM_LAYERS>`
Sparse attention masks	`SparseAttention { sliding_window, strided, big_bird }`
Memory	`SemanticMemory` (type-tagged), `MicroRAG` (knowledge entries + retrieval)
Anomaly	`AnomalyDetector` over embedding drift
Federation	`PipelineNode`, `FederationMessage`, `SpeculativeDecoder`, `CommunicationBus { Spi, I2c, Uart, EspNow, Parallel }`
Embedder	ADR-074 Tier 1 — `hash_embed(text)`: FNV-1a + char bigrams + integer-normalize. No floats, no model, deterministic 64-byte output

3. Per-variant capability matrix

Variant	SRAM	CPU	FPU	SIMD	Default role	`.bin` size
ESP32	520 KB	Xtensa LX6 @ 240 MHz	no	no	RagRetriever	4 MB
ESP32-S2	320 KB	Xtensa LX7 @ 240 MHz	no	no	AnomalySentinel	4 MB
ESP32-S3	512 KB	Xtensa LX7 @ 240 MHz	yes	yes	SpeculativeDrafter	4 MB
ESP32-C3	400 KB	RISC-V @ 160 MHz	no	no	HnswIndexer	4 MB
ESP32-C6	512 KB	RISC-V + WiFi-6 @ 160 MHz	no	no	MemoryArchivist	4 MB

Each .bin is a merged image (bootloader + partition table + app) produced by espflash save-image --merge. The matrix file size is identical because the merged layout pads to the partition boundary; the actual app payload varies between ~430 KB and ~530 KB.

4. Comparison

vs the previous `examples/ruvLLM/esp32-flash` (pre-#409)

Previous framing	This release
Description	"Full-featured LLM v0.2 — INT8/Binary quantized transformer inference"	"ruvLLM/ruvector primitives on heterogeneous ESP32 SoCs"
Built artifact	None — `cargo build` failed on every supported feature combination (see #409)	5 `.bin` files, one per variant
Weights	Generated from index arithmetic (`(i*17+31)%256-64`), no checkpoint loader	No "weights" — primitives operate on caller-supplied INT8 vectors
Attention	`output[i] = (input[i] * weight[i % len]) >> 7`	`SparseAttention` masks (sliding-window / strided / BigBird) — used by speculative drafter, not faked
Federation	Types declared but unreachable from the example	Per-chip role + `FederationMessage` over `Uart`/`EspNow`
README	Claimed sub-5 ms/token transformer inference	Honest "primitive layer + federation" framing with ADR-165 disclaimer
Web flasher URL	404 (no firmware in any release)	5/5 returns HTTP 200

vs other on-device Rust + ESP32 inference projects

ruvllm-esp32 (this release)	Generic ESP-IDF Rust + tflite-micro	ADR-090 ESP32-P4 PSRAM big-model
Target chips	esp32 / s2 / s3 / c3 / c6	s3 (typical)	P4 (8 MB PSRAM)
Memory model	SRAM-only, primitives	SRAM model in 100s KB	PSRAM model in 130 MB
Embedder	Deterministic hash (no model)	TFLite quantized	RuvLTRA-trained sentence embedder
Inference primitive	HNSW kNN / RAG / anomaly	TFLite interpreter	LFM2 cortex via PiQ3
Adaptation	MicroLoRA rank 1–2 on cached activations	none	full LoRA-QAT
Federation	Built in (`FederationMessage`, 8 chips)	DIY	DIY
Status	Released (this artifact)	Generally available	Phase 2/3 implementation (ADR-090)

The three columns are complementary, not competing — the ESP32-P4 PSRAM lane (ADR-090) is the path to "real model" inference; this release is the federation-ready primitive layer that the P4 chip will join as one node.

5. Usage guide

Option A — Web flasher (zero-install, 1-click)

The web flasher is hardcoded against this exact asset URL pattern; pick your variant and click flash:

https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-esp32.bin
https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-esp32s2.bin
https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-esp32s3.bin
https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-esp32c3.bin
https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-esp32c6.bin

All 5 URLs return HTTP 200 (G6 acceptance gate). Use examples/ruvLLM/esp32-flash/web-flasher/index.html from the repo (or its npm/web-flasher copy) — the page handles WebSerial flashing in-browser.

Option B — `espflash` from a terminal

# Install espflash if you don't have it
cargo install espflash --locked
# Pick your chip (esp32, esp32s2, esp32s3, esp32c3, esp32c6) and flash
ESP_TARGET=esp32s3
curl -L -o ruvllm-esp32-${ESP_TARGET}.bin \
 https://github.com/ruvnet/RuVector/releases/download/ruvllm-esp32-v0.3.0-rc2/ruvllm-esp32-${ESP_TARGET}.bin
espflash write-bin --port /dev/ttyACM0 0x0 ruvllm-esp32-${ESP_TARGET}.bin
# OR if your board needs the auto-flash with merged layout:
espflash flash --chip ${ESP_TARGET} --port /dev/ttyACM0 ruvllm-esp32-${ESP_TARGET}.bin

After flashing, open a serial monitor at 115200 baud:

espflash monitor --port /dev/ttyACM0
# or
picocom -b 115200 /dev/ttyACM0

Option C — Build from source

Prerequisites:

# Xtensa toolchain (esp32, esp32s2, esp32s3 only)
cargo install espup --locked
espup install
source ~/export-esp.sh
# RISC-V toolchain (esp32c3, esp32c6 only)
rustup toolchain install nightly --component rust-src
# Linker proxy + flasher (always)
cargo install ldproxy espflash --locked

Build (cwd: `examples/ruvLLM/esp32-...

Assets 7

Release v2.2.0

20 Apr 18:00

@ruvnet ruvnet

v2.2.0

cb72da0

Release v2.2.0

RuVector Release v2.2.0

Published Packages

crates.io

ruvector-math - Advanced math primitives
ruvector-attention - 7-theory attention mechanisms
ruvector-math-wasm - WASM bindings for math
ruvector-attention-wasm - WASM bindings for attention

npm

@ruvector/math-wasm - Browser WASM package
@ruvector/attention - Main Node.js package (auto-selects platform)
@ruvector/attention-wasm - Browser WASM package
Platform-specific: linux-x64, linux-arm64, darwin-x64, darwin-arm64, win32-x64

Installation

# Rust
cargo add ruvector-math ruvector-attention
# Node.js (auto-selects correct binary)
npm install @ruvector/attention
# Browser (WASM)
npm install @ruvector/math-wasm @ruvector/attention-wasm

Assets 9

2 people reacted

Release v2.1.2

07 Apr 02:05

@ruvnet ruvnet

v2.1.2

6a655e2

Release v2.1.2

RuVector Release v2.1.2

Published Packages

crates.io

ruvector-math - Advanced math primitives
ruvector-attention - 7-theory attention mechanisms
ruvector-math-wasm - WASM bindings for math
ruvector-attention-wasm - WASM bindings for attention

npm

@ruvector/math-wasm - Browser WASM package
@ruvector/attention - Main Node.js package (auto-selects platform)
@ruvector/attention-wasm - Browser WASM package
Platform-specific: linux-x64, linux-arm64, darwin-x64, darwin-arm64, win32-x64

Installation

# Rust
cargo add ruvector-math ruvector-attention
# Node.js (auto-selects correct binary)
npm install @ruvector/attention
# Browser (WASM)
npm install @ruvector/math-wasm @ruvector/attention-wasm

Assets 9

Release v2.1.1-router-fix

06 Apr 21:17

@ruvnet ruvnet

v2.1.1-router-fix

7d5bb04

Release v2.1.1-router-fix

RuVector Release v2.1.1-router-fix

Published Packages

crates.io

ruvector-math - Advanced math primitives
ruvector-attention - 7-theory attention mechanisms
ruvector-math-wasm - WASM bindings for math
ruvector-attention-wasm - WASM bindings for attention

npm

@ruvector/math-wasm - Browser WASM package
@ruvector/attention - Main Node.js package (auto-selects platform)
@ruvector/attention-wasm - Browser WASM package
Platform-specific: linux-x64, linux-arm64, darwin-x64, darwin-arm64, win32-x64

Installation

# Rust
cargo add ruvector-math ruvector-attention
# Node.js (auto-selects correct binary)
npm install @ruvector/attention
# Browser (WASM)
npm install @ruvector/math-wasm @ruvector/attention-wasm

Assets 9

3 people reacted

Release v2.1.0-rudevolution

04 Apr 22:37

@ruvnet ruvnet

v2.1.0-rudevolution

878f9fd

Release v2.1.0-rudevolution

RuVector Release v2.1.0-rudevolution

Published Packages

crates.io

ruvector-math - Advanced math primitives
ruvector-attention - 7-theory attention mechanisms
ruvector-math-wasm - WASM bindings for math
ruvector-attention-wasm - WASM bindings for attention

npm

@ruvector/math-wasm - Browser WASM package
@ruvector/attention - Main Node.js package (auto-selects platform)
@ruvector/attention-wasm - Browser WASM package
Platform-specific: linux-x64, linux-arm64, darwin-x64, darwin-arm64, win32-x64

Installation

# Rust
cargo add ruvector-math ruvector-attention
# Node.js (auto-selects correct binary)
npm install @ruvector/attention
# Browser (WASM)
npm install @ruvector/math-wasm @ruvector/attention-wasm

Assets 9

Releases: ruvnet/RuVector

@ruvector/rvagent-wasm 0.2.0

@ruvector/rvagent-wasm 0.2.0

Changes from 0.1.0

ADR-129 context

Compatible with

Installing

PR

Uh oh!

ruvllm_sparse_attention v0.1.1 — FastGRNN-gated near-linear attention + no_std/ESP32-S3

What's new

Highlights

Verification matrix

Migration

What's next

Uh oh!

ruvllm Pi 5 cluster v1.0.0 (ADR-179, iter 28)

Headline

What ships

Cluster topology

Convergence trajectory

Crates published

Out of scope (next ADRs)

Uh oh!

ruvector-hailo backend v0.2.0 (iter 227)

Performance (cognitum-v0, Pi 5 + AI HAT+, c=4 b=1)

Two arcs since v0.1.0-iter156b

Arc 1 — Security / hardening (iters 174-213)

Arc 2 — ADR-178 integration gap analysis (iters 215-227)

Verification

Companion artifacts

Uh oh!

Hailo-8 encoder HEF — all-MiniLM-L6-v2 (iter 156b)

Artifact

Architecture

How to use

Performance

Build provenance

Note on accuracy vs cpu-fallback

Uh oh!

ruvllm-esp32 v0.3.0-rc2 — Tiny RuvLLM Agents on Heterogeneous ESP32 SoCs

ruvllm-esp32 v0.3.0-rc2 — Tiny RuvLLM Agents on Heterogeneous ESP32 SoCs

1. Introduction

What's actually on each chip

Why this matters

What this release is NOT

2. Features

Tiny-agent role catalog (ADR-165 §2.1)

Primitive surface (lib.rs)

3. Per-variant capability matrix

4. Comparison

vs the previous examples/ruvLLM/esp32-flash (pre-#409)

vs other on-device Rust + ESP32 inference projects

5. Usage guide

Option A — Web flasher (zero-install, 1-click)

Option B — espflash from a terminal

Option C — Build from source

Uh oh!

Release v2.2.0

RuVector Release v2.2.0

Published Packages

crates.io

npm

Installation

Uh oh!

Release v2.1.2

RuVector Release v2.1.2

Published Packages

crates.io

npm

Installation

Uh oh!

Release v2.1.1-router-fix

RuVector Release v2.1.1-router-fix

Published Packages

crates.io

npm

Installation

Uh oh!

Release v2.1.0-rudevolution

Primitive surface (`lib.rs`)

vs the previous `examples/ruvLLM/esp32-flash` (pre-#409)

Option B — `espflash` from a terminal