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Stabilize 28 RISC-V target features (riscv_ratified_v2) #145948

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6 changes: 2 additions & 4 deletions compiler/rustc_codegen_ssa/src/back/metadata.rs
View file Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -330,14 +330,12 @@ pub(super) fn elf_e_flags(architecture: Architecture, sess: &Session) -> u32 {
let mut e_flags: u32 = 0x0;

// Check if compression is enabled
// `unstable_target_features` is used here because "zca" is gated behind riscv_target_feature.
if sess.unstable_target_features.contains(&sym::zca) {
if sess.target_features.contains(&sym::zca) {
e_flags |= elf::EF_RISCV_RVC;
}

// Check if RVTSO is enabled
// `unstable_target_features` is used here because "ztso" is gated behind riscv_target_feature.
if sess.unstable_target_features.contains(&sym::ztso) {
if sess.target_features.contains(&sym::ztso) {
e_flags |= elf::EF_RISCV_TSO;
}

Expand Down
56 changes: 28 additions & 28 deletions compiler/rustc_target/src/target_features.rs
View file Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -589,7 +589,7 @@ const NVPTX_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
// tidy-alphabetical-start
("a", Stable, &["zaamo", "zalrsc"]),
("b", Unstable(sym::riscv_target_feature), &["zba", "zbb", "zbs"]),
("b", Stable, &["zba", "zbb", "zbs"]),
("c", Stable, &["zca"]),
("d", Unstable(sym::riscv_target_feature), &["f"]),
("e", Unstable(sym::riscv_target_feature), &[]),
Expand Down Expand Up @@ -647,24 +647,24 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
("unaligned-scalar-mem", Unstable(sym::riscv_target_feature), &[]),
("unaligned-vector-mem", Unstable(sym::riscv_target_feature), &[]),
("v", Unstable(sym::riscv_target_feature), &["zvl128b", "zve64d"]),
("za64rs", Unstable(sym::riscv_target_feature), &["za128rs"]), // Za64rs ⊃ Za128rs
("za128rs", Unstable(sym::riscv_target_feature), &[]),
("zaamo", Unstable(sym::riscv_target_feature), &[]),
("zabha", Unstable(sym::riscv_target_feature), &["zaamo"]),
("za64rs", Stable, &["za128rs"]), // Za64rs ⊃ Za128rs
("za128rs", Stable, &[]),
("zaamo", Stable, &[]),
("zabha", Stable, &["zaamo"]),
("zacas", Unstable(sym::riscv_target_feature), &["zaamo"]),
("zalrsc", Unstable(sym::riscv_target_feature), &[]),
("zama16b", Unstable(sym::riscv_target_feature), &[]),
("zawrs", Unstable(sym::riscv_target_feature), &[]),
("zalrsc", Stable, &[]),
("zama16b", Stable, &[]),
("zawrs", Stable, &[]),
("zba", Stable, &[]),
("zbb", Stable, &[]),
("zbc", Stable, &["zbkc"]), // Zbc ⊃ Zbkc
("zbkb", Stable, &[]),
("zbkc", Stable, &[]),
("zbkx", Stable, &[]),
("zbs", Stable, &[]),
("zca", Unstable(sym::riscv_target_feature), &[]),
("zcb", Unstable(sym::riscv_target_feature), &["zca"]),
("zcmop", Unstable(sym::riscv_target_feature), &["zca"]),
("zca", Stable, &[]),
("zcb", Stable, &["zca"]),
("zcmop", Stable, &["zca"]),
("zdinx", Unstable(sym::riscv_target_feature), &["zfinx"]),
("zfa", Unstable(sym::riscv_target_feature), &["f"]),
("zfbfmin", Unstable(sym::riscv_target_feature), &["f"]), // and a subset of Zfhmin
Expand All @@ -673,22 +673,22 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
("zfinx", Unstable(sym::riscv_target_feature), &["zicsr"]),
("zhinx", Unstable(sym::riscv_target_feature), &["zhinxmin"]),
("zhinxmin", Unstable(sym::riscv_target_feature), &["zfinx"]),
("zic64b", Unstable(sym::riscv_target_feature), &[]),
("zicbom", Unstable(sym::riscv_target_feature), &[]),
("zicbop", Unstable(sym::riscv_target_feature), &[]),
("zicboz", Unstable(sym::riscv_target_feature), &[]),
("ziccamoa", Unstable(sym::riscv_target_feature), &[]),
("ziccif", Unstable(sym::riscv_target_feature), &[]),
("zicclsm", Unstable(sym::riscv_target_feature), &[]),
("ziccrse", Unstable(sym::riscv_target_feature), &[]),
("zicntr", Unstable(sym::riscv_target_feature), &["zicsr"]),
("zicond", Unstable(sym::riscv_target_feature), &[]),
("zicsr", Unstable(sym::riscv_target_feature), &[]),
("zifencei", Unstable(sym::riscv_target_feature), &[]),
("zihintntl", Unstable(sym::riscv_target_feature), &[]),
("zihintpause", Unstable(sym::riscv_target_feature), &[]),
("zihpm", Unstable(sym::riscv_target_feature), &["zicsr"]),
("zimop", Unstable(sym::riscv_target_feature), &[]),
("zic64b", Stable, &[]),
("zicbom", Stable, &[]),
("zicbop", Stable, &[]),
("zicboz", Stable, &[]),
("ziccamoa", Stable, &[]),
("ziccif", Stable, &[]),
("zicclsm", Stable, &[]),
("ziccrse", Stable, &[]),
("zicntr", Stable, &["zicsr"]),
("zicond", Stable, &[]),
("zicsr", Stable, &[]),
("zifencei", Stable, &[]),
("zihintntl", Stable, &[]),
("zihintpause", Stable, &[]),
("zihpm", Stable, &["zicsr"]),
("zimop", Stable, &[]),
("zk", Stable, &["zkn", "zkr", "zkt"]),
("zkn", Stable, &["zbkb", "zbkc", "zbkx", "zkne", "zknd", "zknh"]),
("zknd", Stable, &[]),
Expand All @@ -699,7 +699,7 @@ static RISCV_FEATURES: &[(&str, Stability, ImpliedFeatures)] = &[
("zksed", Stable, &[]),
("zksh", Stable, &[]),
("zkt", Stable, &[]),
("ztso", Unstable(sym::riscv_target_feature), &[]),
("ztso", Stable, &[]),
("zvbb", Unstable(sym::riscv_target_feature), &["zvkb"]), // Zvbb ⊃ Zvkb
("zvbc", Unstable(sym::riscv_target_feature), &["zve64x"]),
("zve32f", Unstable(sym::riscv_target_feature), &["zve32x", "f"]),
Expand Down
38 changes: 19 additions & 19 deletions library/std_detect/src/detect/arch/riscv.rs
View file Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -194,47 +194,47 @@ features! {
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] unaligned_vector_mem: "unaligned-vector-mem";
/// Has reasonably performant unaligned vector

@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicsr: "zicsr";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicsr: "zicsr";
/// "Zicsr" Extension for Control and Status Register (CSR) Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicntr: "zicntr";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicntr: "zicntr";
/// "Zicntr" Extension for Base Counters and Timers
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihpm: "zihpm";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihpm: "zihpm";
/// "Zihpm" Extension for Hardware Performance Counters
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zifencei: "zifencei";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zifencei: "zifencei";
/// "Zifencei" Extension for Instruction-Fetch Fence

@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintntl: "zihintntl";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihintntl: "zihintntl";
/// "Zihintntl" Extension for Non-Temporal Locality Hints
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zihintpause: "zihintpause";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zihintpause: "zihintpause";
/// "Zihintpause" Extension for Pause Hint
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zimop: "zimop";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zimop: "zimop";
/// "Zimop" Extension for May-Be-Operations
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicbom: "zicbom";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicbom: "zicbom";
/// "Zicbom" Extension for Cache-Block Management Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicboz: "zicboz";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicboz: "zicboz";
/// "Zicboz" Extension for Cache-Block Zero Instruction
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zicond: "zicond";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zicond: "zicond";
/// "Zicond" Extension for Integer Conditional Operations

@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] m: "m";
/// "M" Extension for Integer Multiplication and Division

@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] a: "a";
/// "A" Extension for Atomic Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zalrsc: "zalrsc";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zalrsc: "zalrsc";
/// "Zalrsc" Extension for Load-Reserved/Store-Conditional Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zaamo: "zaamo";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zaamo: "zaamo";
/// "Zaamo" Extension for Atomic Memory Operations
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zawrs: "zawrs";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zawrs: "zawrs";
/// "Zawrs" Extension for Wait-on-Reservation-Set Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zabha: "zabha";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zabha: "zabha";
/// "Zabha" Extension for Byte and Halfword Atomic Memory Operations
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zacas: "zacas";
/// "Zacas" Extension for Atomic Compare-and-Swap (CAS) Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zam: "zam";
without cfg check: true;
/// "Zam" Extension for Misaligned Atomics
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] ztso: "ztso";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] ztso: "ztso";
/// "Ztso" Extension for Total Store Ordering

@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] f: "f";
Expand Down Expand Up @@ -264,20 +264,20 @@ features! {

@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] c: "c";
/// "C" Extension for Compressed Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zca: "zca";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zca: "zca";
/// "Zca" Compressed Instructions excluding Floating-Point Loads/Stores
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcf: "zcf";
without cfg check: true;
/// "Zcf" Compressed Instructions for Single-Precision Floating-Point Loads/Stores on RV32
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcd: "zcd";
without cfg check: true;
/// "Zcd" Compressed Instructions for Double-Precision Floating-Point Loads/Stores
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcb: "zcb";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zcb: "zcb";
/// "Zcb" Simple Code-size Saving Compressed Instructions
@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] zcmop: "zcmop";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] zcmop: "zcmop";
/// "Zcmop" Extension for Compressed May-Be-Operations

@FEATURE: #[unstable(feature = "stdarch_riscv_feature_detection", issue = "111192")] b: "b";
@FEATURE: #[stable(feature = "riscv_ratified_v2", since = "CURRENT_RUSTC_VERSION")] b: "b";
/// "B" Extension for Bit Manipulation
@FEATURE: #[stable(feature = "riscv_ratified", since = "1.78.0")] zba: "zba";
/// "Zba" Extension for Address Generation
Expand Down
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