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Releases: nickg/nvc
1.21.0
This is a major new release with the changes listed below. This is also the first version where Verilog support is borderline usable and some real-world projects like PicoRV32 can now be simulated.
- Systems with emulated thread-local storage (in particular all MSYS2 environments except Clang x64 and Clang Arm) are no longer supported due to performance issues.
- Verilog support is significantly improved, particularly in expression width determination, sign extension, and X-propagation.
- Local variables are now ignored in Verilog
@(*)sensitivity lists (#1480). - PSL
next_ais now supported with simple expressions (from @Blebowski). - Fixed several bugs related to concatenating arrays-of-arrays (#1534, #1539)
- Several other minor bugs were resolved (#1506, #1516, #1522, #1529, #1541, #1544, #1543, #1528, #1503, #1475, #1535, #1517).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.20.1
This is a minor bug fix release addressing several issues that were found in 1.20.0:
- Fix a crash while evaluating matching relational operator with constant arguments (#1495).
- Fixed several regressions in coverage report generation (#1490, #1494).
- Several other minor bugs were resolved (#1498, #1505, #1512, #1496).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.20.0
This is a major new release with much improved Verilog and mixed-language support and the following changes:
- The new
vhpi_ext_nvc.hheader contains definitions for proprietary VHPI extensions. - Added a
vhpiRandomSeedPproperty forvhpiToolKwhich returns the random seed for the simulation. - VHPI now returns the correct bounds for arrays-of-records where the record has an unconstrained element (#1463).
- Optimisations for elaborating large Verilog netlists (#1461).
- Verilog modules in mixed language simulations are now present in VHPI using the vendor-specific
vhpiVerilogModuleKclass (#1473). - The Verilog preprocessor now supports macros with arguments (#1402).
- The
NVC_PLUGIN_PATHenvironment variable can be used to specify a list of directories to search when the argument to--loadis not a valid path. - Added support for VHDL-2019 extended ranges.
- Several other minor bugs were resolved (#1453, #1460, #1466, #1469, #1394, #1476, #1472, #1474).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.19.3
This is a minor bug fix release with the following changes:
- VHPI value change callbacks for indexed names now work correctly (#1428).
- Added support for iterating physical unit declarations in VHPI (#1437).
- VHPI returns correct format for
timeandtime_vectortypes (#1441, from @oscargus). - Terminal hyperlink ANSI escape sequences are no longer emitted if
NVC_COLORS=alwaysis set but the output is not a terminal (#1433). - Several other minor bugs were resolved (#1431, #1438, #1446).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
- @bpadalino
- @cmarqu
- @tmeissner
- @m42uko
- @oscargus
- @augustofg
- @albydnc
- @a-panella
- @amb5l
- @Blebowski
- @johonkanen
Assets 7
1.19.2
This is a minor bug fix release with the following changes:
- Fixed a crash when dumping a waveform
--dump-arraysand the design contains a null array of records (#1420). - Fixed an error when setting generics on the command line with
-gafter analysing with--preserve-case(#1421). - Added support for reading physical types in
vhpi_get_value. - Fixed quoting issues which caused
nvc --installto fail if the installation directory contained spaces (#1419). - Several other minor bugs were resolved (#1422, #1424).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.19.1
This is a minor bug fix release with the following changes:
- Fixed a fatal error when a design unit instantiated multiple times inside a generate statement contains a PSL assertion (#1400).
- Fixed a crash when no command line arguments are given (#1410).
- Fixed an issue where
library workwould incorrectly report an error when using the--preserve-caseanalysis option (#1413). - Fixed a crash when a protected type is declared in an architecture that is instantiated multiple types (#1405, #1417).
- Fixed an "invalid container kind T_ELAB" fatal error when elaborating a component instantiation (#1404).
- Several other minor bugs were resolved (#1401).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.19.0
This is a major new release with the following changes:
- PSL
next_eandnext_e!operators and thenondetbuilt-in function are now supported. - The
--precompileelaboration option which was deprecated in the last release has been removed. The related--with-system-ccconfigure option has also been removed. - The
--stderr=noneoption now prevents any diagnostic messages being printed tostderr, including those atfailureseverity (#1357). - The VITAL and Synopsys packages are now compiled into the
ieeelibrary for VHDL-2019 (#1360). - The new
--relative=DIRanalysis option saves all file names relative toDIR. This can be useful to ensure reproducibility of binary libraries (#1359). - Very large subprograms containing tens of thousands of operations can now be compiled (#1259).
- Added
-Werroranalysis option to escalate warnings into errors. - Code coverage report style was improved and average coverage numbers are now printed after a run completes.
- Expression coverage reporting for multi-line expressions was improved.
- Fixed waveform dumping for arrays of enumerated types (#1362).
- The fractional part of
std.env.epochis now correct andto_stringonstd.env.time_recordnow displays months correctly according to ISO 8601 (#1381). - Verilog support has improved significantly, with the ZipCPU FFT core now able to be simulated (#1336).
- Elaboration of large netlists is now significantly faster (#1331, #1341).
- Updated to OSVVM 2025.06a and UVVM 2025年11月28日 for
nvc --install. - Several other minor bugs were resolved (#1237, #1350, #1351, #1353, #1366, #1372, #1333, #1388, #1393, #1396, #1395).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.18.2
This is a minor bug fix release with the following changes:
- Fixed a mis-optimisation which would cause the result of
x * xto be zero (#1338, from @Blebowski). - Several other minor bugs were resolved (#1239, #1332, #1334, #1335, #1347, #1348).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!
Contributors
Assets 7
1.18.1
This is a minor bug fix release with the following changes:
- Fixed a crash when compiling with AVX2 enabled (#1311).
- Calling
vhpi_get(vhpiBaseType, ..)on a subtype with additional constraints such asnatural range 0 to 1now correctly returns thevhpiIntTypeDeclKbase type instead of anothervhpiSubtypeDeclK. - Fixed a crash when
releaseis used with a record signal (#1313). - Several other minor bugs were resolved (#1308, #1317, #1318, #1323).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, @augustofg, and @ikwzm for sponsoring me!
Contributors
- @bpadalino
- @cmarqu
- @tmeissner
- @ikwzm
- @m42uko
- @augustofg
- @albydnc
- @a-panella
- @amb5l
- @Blebowski
- @johonkanen
Assets 7
1.18.0
The main focus of this release has been improving support for Verilog and mixed-language simulation and some non-trivial designs can now be simulated, for example axis2mm from ZipCPU. NVC now passes around one third of the Icarus Verilog test suite. Additionally:
- Scheduling of blocking and non-blocking assignments in mixed-language simulation now more accurately reflects Verilog semantics (#1227).
- Aliases of component declarations are now allowed (#1276).
- Added missing check that partial associations appear in a contiguous sequence (#1254).
- The new
-Ianalysis option adds search directories for the Verilogincludedirective. - Fixed compatibility with LLVM 21.
- Fixed a crash when
--cover-fileis specified with a non-existent directory (#1287). - The
-fanalysis option can now interpolate environment variables in the file list using$var. - Constraints for variables and signals declared with partially constrained subtypes are now correctly propagated from the initial value (#1274).
- VHDL-2002 changes for buffer port connections are now implemented correctly (#1290).
- The
--precompileelaboration option is deprecated and will be removed in the next release. Please get in touch if you are still using this. - Passing array
outarguments using the non-standardVHPIDIRECTcalling convention now works correctly (#1301). - Several other minor bugs were resolved (#1253, #1269, #1277, #1279, #1280, #1281).
Special thank you to @bpadalino, @tmeissner, @Blebowski, @amb5l, @m42uko, @a-panella, @cmarqu, @albydnc, @johonkanen, and @augustofg for sponsoring me!