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[arm64] Avoid sign-extending TYP_INT register moves#129864
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[arm64] Avoid sign-extending TYP_INT register moves #129864AndyAyersMS wants to merge 2 commits into
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Revise ins_Move_Extend to emit mov instead of a sxtw for TYP_INT moves. Add an optional dstType arg to assert the move is valid and non-widening. Fixes dotnet#129052. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Impacts about 150K instructions across 62K methods in SPMI.
@tannergooding PTAL
fyi @dotnet/jit-contrib
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Pull request overview
This PR adjusts ARM64 JIT move/extend selection so that TYP_INT register-to-register moves no longer emit sxtw (sign-extend) and instead use mov, avoiding unnecessary work when the value remains int-typed. It also adds an optional dstType parameter to help assert move validity (non-widening) and introduces a JIT disasm-based regression test.
Changes:
- Update
ins_Move_Extend(ARM64) to returnINS_movforTYP_INTreg-reg moves instead ofINS_sxtw. - Thread an optional
dstTypethroughinst_Mov_Extend/ins_Move_Extendand add a debug assert to validate non-widening moves. - Add a new ARM64 disasm-check regression test under
InstructionCombining.
Reviewed changes
Copilot reviewed 4 out of 4 changed files in this pull request and generated 2 comments.
| File | Description |
|---|---|
| src/coreclr/jit/instr.cpp | ARM64 ins_Move_Extend now prefers mov for TYP_INT reg-reg moves; adds optional dstType assertion plumbing. |
| src/coreclr/jit/codegen.h | Updates declarations to include the new optional dstType parameter. |
| src/tests/JIT/opt/InstructionCombining/IntMoveNoSignExtend.cs | New disasm-check test validating no sxtw is emitted for int moves and that real int -> long widening still uses sxtw. |
| src/tests/JIT/opt/InstructionCombining/IntMoveNoSignExtend.csproj | New test project wiring with disasm checks and environment variable settings. |
[MethodImpl(MethodImplOptions.NoInlining)]
static int IntMove()
{
//ARM64-NOT: sxtw {{w[0-9]+}}, {{w[0-9]+}}
Comment on lines
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// A TYP_INT value only needs its low 32 bits; mov Wd, Wn zero extends the rest.
ins = INS_mov;
Broaden the int/long mov comment to mention the EA_4BYTE zero extension, and simplify the test's sxtw disasm check to a bare ARM64-NOT. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Revise ins_Move_Extend to emit mov instead of a sxtw for TYP_INT moves. Add an optional dstType arg to assert the move is valid and non-widening.
Fixes #129052.